From: Thierry Reding <thierry.reding@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Nagarjuna Kristam <nkristam@nvidia.com>,
Sowjanya Komatineni <skomatineni@nvidia.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: tegra186: Add missing CPU PMUs
Date: Tue, 10 Nov 2020 18:36:01 +0100 [thread overview]
Message-ID: <20201110173601.GA2297135@ulmo> (raw)
In-Reply-To: <20201013095851.311478-1-maz@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 2142 bytes --]
On Tue, Oct 13, 2020 at 10:58:51AM +0100, Marc Zyngier wrote:
> Add the description of CPU PMUs for both the Denver and A57 clusters,
> which enables the perf subsystem.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 28 +++++++++++++++++++-----
> 1 file changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index fd44545e124d..6bb03668a8d3 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -1321,7 +1321,7 @@ cpus {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - cpu@0 {
> + denver_0: cpu@0 {
> compatible = "nvidia,tegra186-denver";
> device_type = "cpu";
> i-cache-size = <0x20000>;
> @@ -1334,7 +1334,7 @@ cpu@0 {
> reg = <0x000>;
> };
>
> - cpu@1 {
> + denver_1: cpu@1 {
> compatible = "nvidia,tegra186-denver";
> device_type = "cpu";
> i-cache-size = <0x20000>;
> @@ -1347,7 +1347,7 @@ cpu@1 {
> reg = <0x001>;
> };
>
> - cpu@2 {
> + ca57_0: cpu@2 {
> compatible = "arm,cortex-a57";
> device_type = "cpu";
> i-cache-size = <0xC000>;
> @@ -1360,7 +1360,7 @@ cpu@2 {
> reg = <0x100>;
> };
>
> - cpu@3 {
> + ca57_1: cpu@3 {
> compatible = "arm,cortex-a57";
> device_type = "cpu";
> i-cache-size = <0xC000>;
> @@ -1373,7 +1373,7 @@ cpu@3 {
> reg = <0x101>;
> };
>
> - cpu@4 {
> + ca57_2: cpu@4 {
> compatible = "arm,cortex-a57";
> device_type = "cpu";
> i-cache-size = <0xC000>;
> @@ -1386,7 +1386,7 @@ cpu@4 {
> reg = <0x102>;
> };
>
> - cpu@5 {
> + ca57_3: cpu@5 {
> compatible = "arm,cortex-a57";
> device_type = "cpu";
> i-cache-size = <0xC000>;
> @@ -1418,6 +1418,22 @@ L2_A57: l2-cache1 {
> };
> };
>
> + pmu_denver {
> + compatible = "nvidia,denver-pmu", "arm,armv8-pmuv3";
checkpatch complains that this isn't documented. Did I miss the DT
bindings patch or do we not have one for this?
Thierry
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2020-11-10 17:36 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-13 9:58 [PATCH] arm64: tegra186: Add missing CPU PMUs Marc Zyngier
2020-11-10 17:36 ` Thierry Reding [this message]
2020-11-10 18:08 ` Marc Zyngier
2020-11-10 18:22 ` Thierry Reding
2020-11-10 18:27 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201110173601.GA2297135@ulmo \
--to=thierry.reding@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=maz@kernel.org \
--cc=nkristam@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=skomatineni@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).