From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v1 0/3] Couple improvements for Tegra clk driver
Date: Wed, 16 Dec 2020 00:11:47 +0300 [thread overview]
Message-ID: <20201215211150.21214-1-digetx@gmail.com> (raw)
This series fixes couple minor problems of the Tegra clk driver.
Please review and apply, thanks in advance.
Dmitry Osipenko (3):
clk: tegra30: Use 300MHz for video decoder by default
clk: tegra: Fix refcounting of gate clocks
clk: tegra: Ensure that PLLU configuration is applied properly
drivers/clk/tegra/clk-periph-gate.c | 72 +++++++++++++++++++----------
drivers/clk/tegra/clk-periph.c | 11 +++++
drivers/clk/tegra/clk-pll.c | 9 ++--
drivers/clk/tegra/clk-tegra30.c | 2 +-
4 files changed, 63 insertions(+), 31 deletions(-)
--
2.29.2
next reply other threads:[~2020-12-15 21:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-15 21:11 Dmitry Osipenko [this message]
2020-12-15 21:11 ` [PATCH v1 1/3] clk: tegra30: Use 300MHz for video decoder by default Dmitry Osipenko
2020-12-15 21:11 ` [PATCH v1 2/3] clk: tegra: Fix refcounting of gate clocks Dmitry Osipenko
2020-12-15 21:11 ` [PATCH v1 3/3] clk: tegra: Ensure that PLLU configuration is applied properly Dmitry Osipenko
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