From: Catalin Marinas <catalin.marinas@arm.com>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: linux-arm-kernel@lists.infradead.org,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Suzuki K Poulose <Suzuki.Poulose@arm.com>,
linux-tegra <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH 2/2] arm64: Check if GMID_EL1.BS is the same on all CPUs
Date: Wed, 26 May 2021 22:48:16 +0100 [thread overview]
Message-ID: <20210526214815.GA5083@arm.com> (raw)
In-Reply-To: <e30a7d50-5ee3-990a-3f0a-d5009f1e6869@nvidia.com>
On Wed, May 26, 2021 at 08:47:16PM +0100, Jon Hunter wrote:
> On 11/05/2021 19:23, Catalin Marinas wrote:
> > The GMID_EL1.BS field determines the number of tags accessed by the
> > LDGM/STGM instructions (EL1 and up), used by the kernel for copying or
> > zeroing page tags.
> >
> > Taint the kernel if GMID_EL1.BS differs between CPUs.
> >
> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
[...]
> I am seeing the following undefined instruction crash on all our
> ARM64 Tegra devices on today's -next and bisect is pointing to
> this patch. Reverting this patch on top of -next does fix the
> problem. Let me know if you have any thoughts.
Yeah, sorry about that. Posted a new version here, better tested:
https://lore.kernel.org/r/20210526193621.21559-1-catalin.marinas@arm.com
Will should have dropped the old one from linux-next but it takes a few
hours before Stephen re-creates the tree.
--
Catalin
next prev parent reply other threads:[~2021-05-26 21:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210511182322.3830-1-catalin.marinas@arm.com>
[not found] ` <20210511182322.3830-3-catalin.marinas@arm.com>
2021-05-26 19:47 ` [PATCH 2/2] arm64: Check if GMID_EL1.BS is the same on all CPUs Jon Hunter
2021-05-26 21:08 ` Will Deacon
2021-05-26 21:48 ` Catalin Marinas [this message]
2021-05-26 22:11 ` Jon Hunter
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