Linux Tegra architecture development
 help / color / mirror / Atom feed
From: kernel test robot <lkp@intel.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: kbuild-all@lists.01.org, dri-devel@lists.freedesktop.org,
	linux-tegra@vger.kernel.org, Thierry Reding <treding@nvidia.com>
Subject: [tegra-drm:drm/tegra/for-next 16/17] drivers/gpu/drm/tegra/dc.c:1843:53: warning: variable 'new_dc_state' set but not used
Date: Sat, 14 Aug 2021 00:36:34 +0800	[thread overview]
Message-ID: <202108140028.U2Z9tWIN-lkp@intel.com> (raw)

[-- Attachment #1: Type: text/plain, Size: 5964 bytes --]

tree:   git://anongit.freedesktop.org/tegra/linux.git drm/tegra/for-next
head:   ad85b0843ee4536593415ca890d7fb52cd7f1fbe
commit: 04d5d5df9df79f9045e76404775fc8a084aac23d [16/17] drm/tegra: dc: Support memory bandwidth management
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git remote add tegra-drm git://anongit.freedesktop.org/tegra/linux.git
        git fetch --no-tags tegra-drm drm/tegra/for-next
        git checkout 04d5d5df9df79f9045e76404775fc8a084aac23d
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/tegra/dc.c: In function 'tegra_crtc_update_memory_bandwidth':
>> drivers/gpu/drm/tegra/dc.c:1843:53: warning: variable 'new_dc_state' set but not used [-Wunused-but-set-variable]
    1843 |         const struct tegra_dc_state *old_dc_state, *new_dc_state;
         |                                                     ^~~~~~~~~~~~
>> drivers/gpu/drm/tegra/dc.c:1843:38: warning: variable 'old_dc_state' set but not used [-Wunused-but-set-variable]
    1843 |         const struct tegra_dc_state *old_dc_state, *new_dc_state;
         |                                      ^~~~~~~~~~~~
   drivers/gpu/drm/tegra/dc.c: In function 'tegra_crtc_calculate_memory_bandwidth':
>> drivers/gpu/drm/tegra/dc.c:2223:38: warning: variable 'old_state' set but not used [-Wunused-but-set-variable]
    2223 |         const struct drm_crtc_state *old_state;
         |                                      ^~~~~~~~~


vim +/new_dc_state +1843 drivers/gpu/drm/tegra/dc.c

  1836	
  1837	static void
  1838	tegra_crtc_update_memory_bandwidth(struct drm_crtc *crtc,
  1839					   struct drm_atomic_state *state,
  1840					   bool prepare_bandwidth_transition)
  1841	{
  1842		const struct tegra_plane_state *old_tegra_state, *new_tegra_state;
> 1843		const struct tegra_dc_state *old_dc_state, *new_dc_state;
  1844		u32 i, new_avg_bw, old_avg_bw, new_peak_bw, old_peak_bw;
  1845		const struct drm_plane_state *old_plane_state;
  1846		const struct drm_crtc_state *old_crtc_state;
  1847		struct tegra_dc_window window, old_window;
  1848		struct tegra_dc *dc = to_tegra_dc(crtc);
  1849		struct tegra_plane *tegra;
  1850		struct drm_plane *plane;
  1851	
  1852		if (dc->soc->has_nvdisplay)
  1853			return;
  1854	
  1855		old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
  1856		old_dc_state = to_const_dc_state(old_crtc_state);
  1857		new_dc_state = to_const_dc_state(crtc->state);
  1858	
  1859		if (!crtc->state->active) {
  1860			if (!old_crtc_state->active)
  1861				return;
  1862	
  1863			/*
  1864			 * When CRTC is disabled on DPMS, the state of attached planes
  1865			 * is kept unchanged. Hence we need to enforce removal of the
  1866			 * bandwidths from the ICC paths.
  1867			 */
  1868			drm_atomic_crtc_for_each_plane(plane, crtc) {
  1869				tegra = to_tegra_plane(plane);
  1870	
  1871				icc_set_bw(tegra->icc_mem, 0, 0);
  1872				icc_set_bw(tegra->icc_mem_vfilter, 0, 0);
  1873			}
  1874	
  1875			return;
  1876		}
  1877	
  1878		for_each_old_plane_in_state(old_crtc_state->state, plane,
  1879					    old_plane_state, i) {
  1880			old_tegra_state = to_const_tegra_plane_state(old_plane_state);
  1881			new_tegra_state = to_const_tegra_plane_state(plane->state);
  1882			tegra = to_tegra_plane(plane);
  1883	
  1884			/*
  1885			 * We're iterating over the global atomic state and it contains
  1886			 * planes from another CRTC, hence we need to filter out the
  1887			 * planes unrelated to this CRTC.
  1888			 */
  1889			if (tegra->dc != dc)
  1890				continue;
  1891	
  1892			new_avg_bw = new_tegra_state->avg_memory_bandwidth;
  1893			old_avg_bw = old_tegra_state->avg_memory_bandwidth;
  1894	
  1895			new_peak_bw = new_tegra_state->total_peak_memory_bandwidth;
  1896			old_peak_bw = old_tegra_state->total_peak_memory_bandwidth;
  1897	
  1898			/*
  1899			 * See the comment related to !crtc->state->active above,
  1900			 * which explains why bandwidths need to be updated when
  1901			 * CRTC is turning ON.
  1902			 */
  1903			if (new_avg_bw == old_avg_bw && new_peak_bw == old_peak_bw &&
  1904			    old_crtc_state->active)
  1905				continue;
  1906	
  1907			window.src.h = drm_rect_height(&plane->state->src) >> 16;
  1908			window.dst.h = drm_rect_height(&plane->state->dst);
  1909	
  1910			old_window.src.h = drm_rect_height(&old_plane_state->src) >> 16;
  1911			old_window.dst.h = drm_rect_height(&old_plane_state->dst);
  1912	
  1913			/*
  1914			 * During the preparation phase (atomic_begin), the memory
  1915			 * freq should go high before the DC changes are committed
  1916			 * if bandwidth requirement goes up, otherwise memory freq
  1917			 * should to stay high if BW requirement goes down.  The
  1918			 * opposite applies to the completion phase (post_commit).
  1919			 */
  1920			if (prepare_bandwidth_transition) {
  1921				new_avg_bw = max(old_avg_bw, new_avg_bw);
  1922				new_peak_bw = max(old_peak_bw, new_peak_bw);
  1923	
  1924				if (tegra_plane_use_vertical_filtering(tegra, &old_window))
  1925					window = old_window;
  1926			}
  1927	
  1928			icc_set_bw(tegra->icc_mem, new_avg_bw, new_peak_bw);
  1929	
  1930			if (tegra_plane_use_vertical_filtering(tegra, &window))
  1931				icc_set_bw(tegra->icc_mem_vfilter, new_avg_bw, new_peak_bw);
  1932			else
  1933				icc_set_bw(tegra->icc_mem_vfilter, 0, 0);
  1934		}
  1935	}
  1936	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 54404 bytes --]

             reply	other threads:[~2021-08-13 16:37 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-13 16:36 kernel test robot [this message]
2021-08-13 17:12 ` [tegra-drm:drm/tegra/for-next 16/17] drivers/gpu/drm/tegra/dc.c:1843:53: warning: variable 'new_dc_state' set but not used Dmitry Osipenko
2021-08-13 17:16   ` Dmitry Osipenko

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202108140028.U2Z9tWIN-lkp@intel.com \
    --to=lkp@intel.com \
    --cc=digetx@gmail.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=kbuild-all@lists.01.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=treding@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox