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Thu, 4 Nov 2021 04:48:42 -0400 (EDT) Date: Thu, 4 Nov 2021 09:48:41 +0100 From: Maxime Ripard To: Ville =?utf-8?B?U3lyasOkbMOk?= Cc: Emma Anholt , Neil Armstrong , David Airlie , dri-devel@lists.freedesktop.org, Andrzej Hajda , Thierry Reding , amd-gfx@lists.freedesktop.org, Benjamin Gaignard , Daniel Vetter , Phil Elwell , Jerome Brunet , Tim Gover , Dave Stevenson , Kevin Hilman , Jernej Skrabec , Jonathan Hunter , Jonas Karlman , Martin Blumenstingl , intel-gfx@lists.freedesktop.org, Rodrigo Vivi , linux-tegra@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Dom Cobley , "Pan, Xinhui" , Robert Foss , Thomas Zimmermann , Alex Deucher , Christian =?utf-8?B?S8O2bmln?= , Laurent Pinchart Subject: Re: [PATCH 01/13] drm/connector: Add define for HDMI 1.4 Maximum Pixel Rate Message-ID: <20211104084841.mjnennxgelacleaj@gilmour> References: <20211102145944.259181-1-maxime@cerno.tech> <20211102145944.259181-2-maxime@cerno.tech> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="pxndx3anvyrc7z43" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org --pxndx3anvyrc7z43 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Ville, On Wed, Nov 03, 2021 at 08:05:16PM +0200, Ville Syrj=E4l=E4 wrote: > On Wed, Nov 03, 2021 at 01:02:11PM +0200, Ville Syrj=E4l=E4 wrote: > > On Tue, Nov 02, 2021 at 03:59:32PM +0100, Maxime Ripard wrote: > > > --- a/drivers/gpu/drm/drm_edid.c > > > +++ b/drivers/gpu/drm/drm_edid.c > > > @@ -4966,7 +4966,7 @@ static void drm_parse_hdmi_forum_vsdb(struct dr= m_connector *connector, > > > u32 max_tmds_clock =3D hf_vsdb[5] * 5000; > > > struct drm_scdc *scdc =3D &hdmi->scdc; > > > =20 > > > - if (max_tmds_clock > 340000) { > > > + if (max_tmds_clock > DRM_HDMI_14_MAX_TMDS_CLK_KHZ) { > > > display->max_tmds_clock =3D max_tmds_clock; > > > DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n", > > > display->max_tmds_clock); > > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/= drm/i915/display/intel_hdmi.c > > > index d2e61f6c6e08..0666203d52b7 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > > > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > > > @@ -2226,7 +2226,7 @@ int intel_hdmi_compute_config(struct intel_enco= der *encoder, > > > if (scdc->scrambling.low_rates) > > > pipe_config->hdmi_scrambling =3D true; > > > =20 > > > - if (pipe_config->port_clock > 340000) { > > > + if (pipe_config->port_clock > DRM_HDMI_14_MAX_TMDS_CLK_KHZ) { > > > pipe_config->hdmi_scrambling =3D true; > > > pipe_config->hdmi_high_tmds_clock_ratio =3D true; > > > } > >=20 > > All of that is HDMI 2.0 stuff. So this just makes it all super > > confusing IMO. Nak. >=20 > So reading throgh HDMI 1.4 again it does specify 340 MHz as some kind > of upper limit for the physical cable. But nowhere else is that number > really mentioned AFAICS. HDMI 2.0 does talk quite a bit about the 340 > Mcsc limit in various places. >=20 > I wonder what people would think of a couple of helpers like: > - drm_hdmi_{can,must}_use_scrambling() > - drm_hdmi_is_high_tmds_clock_ratio() > or something along those lines? At least with those the code would > read decently and I wouldn't have to wonder what this HDMI 1.4 TMDS > clock limit really is. Patch 2 introduces something along those lines. It doesn't cover everything though, we're using this define in vc4 to limit the available modes in mode_valid on HDMI controllers not 4k-capable We could probably do better on the name, but I still believe a define like this would be valuable. Maxime --pxndx3anvyrc7z43 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYYOeaAAKCRDj7w1vZxhR xW31AP9ZrW1GZ894aQ+2PZr6HfCImm0k5/+iLzGrkzoNuAj3BwD/fm55lGcssQw+ lhcuuMOafgTMwGbj7Dw+tHaTcMYN7w4= =8Jzs -----END PGP SIGNATURE----- --pxndx3anvyrc7z43--