Re: [PATCH v2 1/6] dt-bindings: memory: tegra: Document #interconnect-cells property

Krzysztof Kozlowski
2021-12-12T18:50:29Z

On 10/12/2021 17:47, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The #interconnect-cells properties are required to hook up memory
> clients to the MC/EMC in interconnects properties. Add a description for
> these properties.
>
> Also, allow multiple reg and interrupt entries required by Tegra194 and
> later.

I think number of interrupts is fixed and you do not change them for
newer SoC, so the message is a little bit not precise. Also the subject
does not it the patch - maybe something like - "adjust properties for
Tegra196"?

>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v2:
> - drop incomplete BPMP snippet from example
> - explicitly set minItems for reg property
> - describe MC and EMC general interrupts
>
> .../nvidia,tegra186-mc.yaml | 78 ++++++++++++++++---
> 1 file changed, 67 insertions(+), 11 deletions(-)
>

Best regards,
Krzysztof