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From: Vidya Sagar <vidyas@nvidia.com>
To: <lpieralisi@kernel.org>, <robh@kernel.org>, <kw@linux.com>,
	<bhelgaas@google.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <kishon@ti.com>, <vkoul@kernel.org>,
	<mani@kernel.org>, <Sergey.Semin@baikalelectronics.ru>,
	<ffclaire1224@gmail.com>
Cc: <linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-phy@lists.infradead.org>,
	<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
	<vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V1 7/9] PCI: tegra194: Disable direct speed change for EP
Date: Mon, 19 Sep 2022 20:06:25 +0530	[thread overview]
Message-ID: <20220919143627.13803-8-vidyas@nvidia.com> (raw)
In-Reply-To: <20220919143627.13803-1-vidyas@nvidia.com>

Disable direct speed change for endpoint to prevent it from doing
speed change by itself post physical layer link up at gen1 and also
to leave link speed in control of the host.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
 drivers/pci/controller/dwc/pcie-tegra194.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index e38fedd42034..35d9c3ac3028 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1872,6 +1872,10 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
 
 	reset_control_deassert(pcie->core_rst);
 
+	val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
+	val &= ~PORT_LOGIC_SPEED_CHANGE;
+	dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
+
 	if (pcie->update_fc_fixup) {
 		val = dw_pcie_readl_dbi(pci, CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF);
 		val |= 0x1 << CFG_TIMER_CTRL_ACK_NAK_SHIFT;
-- 
2.17.1


  parent reply	other threads:[~2022-09-19 14:38 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-19 14:36 [PATCH V1 0/9] Enhancements to pcie-tegra194 driver Vidya Sagar
2022-09-19 14:36 ` [PATCH V1 1/9] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Vidya Sagar
2022-09-19 14:36 ` [PATCH V1 2/9] PCI: tegra194: Drive CLKREQ signal low explicitly Vidya Sagar
2022-09-19 14:36 ` [PATCH V1 3/9] PCI: tegra194: Fix polling delay for L2 state Vidya Sagar
2022-09-19 14:36 ` [PATCH V1 4/9] PCI: tegra194: Handle errors in BPMP response Vidya Sagar
2022-09-19 14:36 ` [PATCH V1 5/9] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP Vidya Sagar
2022-09-19 14:36 ` [PATCH V1 6/9] PCI: tegra194: Refactor LTSSM state polling on surprise down Vidya Sagar
2022-09-19 14:36 ` Vidya Sagar [this message]
2022-09-19 14:36 ` [PATCH V1 8/9] phy: tegra: p2u: Set ENABLE_L2_EXIT_RATE_CHANGE in calibration Vidya Sagar
2022-09-19 16:33   ` kernel test robot
2022-09-20  6:11   ` Vinod Koul
2022-09-19 14:36 ` [PATCH V1 9/9] PCI: tegra194: Calibrate P2U for endpoint mode Vidya Sagar

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