From: Bjorn Helgaas <helgaas@kernel.org>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: lpieralisi@kernel.org, robh@kernel.org, kw@linux.com,
bhelgaas@google.com, thierry.reding@gmail.com,
jonathanh@nvidia.com, kishon@ti.com, vkoul@kernel.org,
mani@kernel.org, Sergey.Semin@baikalelectronics.ru,
ffclaire1224@gmail.com, linux-pci@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org, kthota@nvidia.com,
mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V2 6/9] PCI: tegra194: Refactor LTSSM state polling on surprise down
Date: Mon, 26 Sep 2022 13:16:09 -0500 [thread overview]
Message-ID: <20220926181609.GA1612301@bhelgaas> (raw)
In-Reply-To: <20220926115038.24727-7-vidyas@nvidia.com>
On Mon, Sep 26, 2022 at 05:20:35PM +0530, Vidya Sagar wrote:
> On surprise down LTSSM state transisition from L0 -> Recovery.RcvrLock ->
> Recovery.RcvrSpeed -> Gen1 Recovery.RcvrLock -> Detect.
> Recovery.RcvrLock and Recovery.RcvrSpeed time is 24 msec and 48 msec
> respectively. It takes ~96 msec to move from L0 to detect state, hence,
> increase the poll time to 120 msec. Disable the LTSSM state after it moves
> to detect to avoid LTSSM toggle between polling and detect.
s/transisition/transition/
> err = readl_poll_timeout_atomic(pcie->appl_base + APPL_DEBUG,
> data,
> ((data &
> - APPL_DEBUG_LTSSM_STATE_MASK) >>
> - APPL_DEBUG_LTSSM_STATE_SHIFT) ==
> - LTSSM_STATE_PRE_DETECT,
> - 1, LTSSM_TIMEOUT);
> + APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_DETECT_QUIET) ||
> + ((data &
> + APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_DETECT_ACT) ||
> + ((data &
> + APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_PRE_DETECT_QUIET) ||
> + ((data &
> + APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_DETECT_WAIT),
> + LTSSM_DELAY, LTSSM_TIMEOUT);
I know we usually line up the function parameters with that opening
paren, but I think overall it would be nicer to drop a couple of the
leading tabs so these don't wrap so awkwardly.
> + ret = readl_poll_timeout(pcie->appl_base + APPL_DEBUG, val,
> + ((val & APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_DETECT_QUIET) ||
> + ((val & APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_DETECT_ACT) ||
> + ((val & APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_PRE_DETECT_QUIET) ||
> + ((val & APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_DETECT_WAIT) ||
> + ((val & APPL_DEBUG_LTSSM_STATE_MASK) ==
> + LTSSM_STATE_L2_IDLE),
> + LTSSM_DELAY, LTSSM_TIMEOUT);
Ditto.
next prev parent reply other threads:[~2022-09-26 18:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-26 11:50 [PATCH V2 0/9] Enhancements to pcie-tegra194 driver Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 1/9] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 2/9] PCI: tegra194: Drive CLKREQ signal low explicitly Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 3/9] PCI: tegra194: Fix polling delay for L2 state Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 4/9] PCI: tegra194: Handle errors in BPMP response Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 5/9] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 6/9] PCI: tegra194: Refactor LTSSM state polling on surprise down Vidya Sagar
2022-09-26 18:16 ` Bjorn Helgaas [this message]
2022-09-26 11:50 ` [PATCH V2 7/9] PCI: tegra194: Disable direct speed change for EP Vidya Sagar
2022-09-26 11:50 ` [PATCH V2 8/9] phy: tegra: p2u: Set ENABLE_L2_EXIT_RATE_CHANGE in calibration Vidya Sagar
2022-09-26 18:18 ` Bjorn Helgaas
2022-09-26 11:50 ` [PATCH V2 9/9] PCI: tegra194: Calibrate P2U for endpoint mode Vidya Sagar
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