From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8213C4332F for ; Sat, 1 Oct 2022 15:56:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229615AbiJAP4f (ORCPT ); Sat, 1 Oct 2022 11:56:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229464AbiJAP4d (ORCPT ); Sat, 1 Oct 2022 11:56:33 -0400 Received: from bmailout2.hostsharing.net (bmailout2.hostsharing.net [83.223.78.240]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 685751116D; Sat, 1 Oct 2022 08:56:31 -0700 (PDT) Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL TLS DV RSA Mixed SHA256 2020 CA-1" (verified OK)) by bmailout2.hostsharing.net (Postfix) with ESMTPS id 18CFB2800B3C7; Sat, 1 Oct 2022 17:56:27 +0200 (CEST) Received: by h08.hostsharing.net (Postfix, from userid 100393) id F3DA56DC9B; Sat, 1 Oct 2022 17:56:26 +0200 (CEST) Date: Sat, 1 Oct 2022 17:56:26 +0200 From: Lukas Wunner To: Vidya Sagar Cc: bhelgaas@google.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, lpieralisi@kernel.org, kw@linux.com, thierry.reding@gmail.com, jonathanh@nvidia.com, mani@kernel.org, Sergey.Semin@baikalelectronics.ru, jszhang@kernel.org, linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com, Marek =?iso-8859-1?Q?Beh=FAn?= , Pali =?iso-8859-1?Q?Roh=E1r?= , Jonathan Derrick Subject: Re: [PATCH V1 1/4] dt-bindings: Add "hotplug-gpios" PCIe property Message-ID: <20221001155626.GA9324@wunner.de> References: <20220930192747.21471-1-vidyas@nvidia.com> <20220930192747.21471-2-vidyas@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220930192747.21471-2-vidyas@nvidia.com> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Sat, Oct 01, 2022 at 12:57:44AM +0530, Vidya Sagar wrote: > Provide a way for the firmware to tell the OS about the GPIO that can be > used to get the Hot-Plug and Unplug events. [...] > --- a/Documentation/devicetree/bindings/pci/pci.txt > +++ b/Documentation/devicetree/bindings/pci/pci.txt > @@ -32,6 +32,10 @@ driver implementation may support the following properties: > root port to downstream device and host bridge drivers can do programming > which depends on CLKREQ signal existence. For example, programming root port > not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. > +- hotplug-gpios: > + If present this property specifies the GPIO to be used for Hot-Plug/Unplug > + functionality. It is used by the PCIe GPIO Hot-Plug core driver for > + PCIe device Hot-Plug/Unplug events. Please specify the GPIO's semantics in more detail: Is the pin high as long as presence of a card is detected? Or does it pulse when a hotplug/unplug event occurs? Thanks, Lukas