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[2003:e4:1f30:5300:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id gz18-20020a170906f2d200b009659ad1072fsm1646479ejb.113.2023.06.09.12.36.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 12:36:30 -0700 (PDT) From: Thierry Reding To: arm@kernel.org, soc@kernel.org Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 4/6] memory: tegra: Changes for v6.5-rc1 Date: Fri, 9 Jun 2023 21:36:18 +0200 Message-Id: <20230609193620.2275240-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609193620.2275240-1-thierry.reding@gmail.com> References: <20230609193620.2275240-1-thierry.reding@gmail.com> Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Hi ARM SoC maintainers, The following changes since commit ac9a78681b921877518763ba0e89202254349d1b: Linux 6.4-rc1 (2023-05-07 13:34:35 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-6.5-memory for you to fetch changes up to e852af72a7f21f4d25994365af86a92438d68014: memory: tegra: Make CPU cluster BW request a multiple of MC channels (2023-05-16 12:11:01 +0200) Thanks, Thierry ---------------------------------------------------------------- memory: tegra: Changes for v6.5-rc1 This introduces an interconnect provider for the memory controller and external memory controller found on Tegra234 chips that will eventually be used to dynamically scale the EMC frequency based on a device's bandwidth needs. ---------------------------------------------------------------- Shubhi Garg (1): dt-bindings: tegra: Document compatible for IGX Sumit Gupta (5): dt-bindings: tegra: Add ICC IDs for dummy memory clients memory: tegra: Add interconnect support for DRAM scaling in Tegra234 memory: tegra: Add memory clients for Tegra234 memory: tegra: Add software memory clients in Tegra234 memory: tegra: Make CPU cluster BW request a multiple of MC channels Thierry Reding (1): Merge branch 'for-6.5/dt-bindings' into for-6.5/memory Documentation/devicetree/bindings/arm/tegra.yaml | 5 + drivers/memory/tegra/mc.c | 24 + drivers/memory/tegra/mc.h | 1 + drivers/memory/tegra/tegra186-emc.c | 133 +++++ drivers/memory/tegra/tegra234.c | 595 ++++++++++++++++++++++- include/dt-bindings/memory/tegra234-mc.h | 5 + include/linux/tegra-icc.h | 65 +++ include/soc/tegra/mc.h | 8 + 8 files changed, 835 insertions(+), 1 deletion(-) create mode 100644 include/linux/tegra-icc.h