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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207945da63fsm1217015ad.38.2024.09.13.15.49.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2024 15:49:43 -0700 (PDT) Date: Sat, 14 Sep 2024 07:49:42 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: manivannan.sadhasivam@linaro.org Cc: Richard Zhu , Lucas Stach , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Jingoo Han , Chuanhua Lei , Marek Vasut , Yoshihiro Shimoda , Pratyush Anand , Thierry Reding , Jonathan Hunter , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, abel.vesa@linaro.org, johan+linaro@kernel.org, Shashank Babu Chinta Venkata , linux-tegra@vger.kernel.org, Frank Li Subject: Re: [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Message-ID: <20240913224942.GB635227@rocinante> References: <20240911-pci-qcom-gen4-stability-v7-0-743f5c1fd027@linaro.org> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240911-pci-qcom-gen4-stability-v7-0-743f5c1fd027@linaro.org> Hello, > This series adds 16.0 GT/s specific equalization and RX lane margining settings > to the Qcom RC and EP drivers. This series is mandatory for the stable operation > of the PCIe link at 16.0 GT/s on the Qcom platforms. > > NOTE: > ===== > > I've taken over the series from Shashank based on the discussion [1]. In order > to apply the equalization/margining settings properly in the Qcom driver, I > added the first 2 patches to the series which inevitably touches other vendor > drivers also. Applied to controller/qcom, thank you! [01/04] PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed' https://git.kernel.org/pci/pci/c/2cebf68a24ab [02/04] PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed https://git.kernel.org/pci/pci/c/19a69cbd9d43 [03/04] PCI: qcom: Add equalization settings for 16.0 GT/s https://git.kernel.org/pci/pci/c/d45736b59849 [04/04] PCI: qcom: Add RX lane margining settings for 16.0 GT/s https://git.kernel.org/pci/pci/c/d14bc28af34f Krzysztof