From: Svyatoslav Ryhel <clamor95@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Svyatoslav Ryhel <clamor95@gmail.com>
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v1 0/3] clk: tegra: add DFLL support for Tegra 4
Date: Fri, 21 Mar 2025 11:55:53 +0200 [thread overview]
Message-ID: <20250321095556.91425-1-clamor95@gmail.com> (raw)
DFLL is a dedicated clock source for the Fast CPU. The DFLL is based on
a ring oscillator and translates voltage changes into frequency
compensation changes needed to prevent the CPU from failing and is
essential for correct CPU frequency scaling.
Svyatoslav Ryhel (3):
drivers: cpufreq: add Tegra 4 support
drivers: clk: tegra: add DFLL support for Tegra 4
ARM: tegra: Add DFLL clock support on Tegra 4
arch/arm/boot/dts/nvidia/tegra114.dtsi | 34 +++++++
drivers/clk/tegra/Kconfig | 2 +-
drivers/clk/tegra/clk-tegra114.c | 30 +++++-
drivers/clk/tegra/clk-tegra124-dfll-fcpu.c | 104 +++++++++++++++++++++
drivers/clk/tegra/clk.h | 2 -
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/tegra124-cpufreq.c | 5 +-
include/dt-bindings/reset/tegra114-car.h | 13 +++
8 files changed, 182 insertions(+), 9 deletions(-)
create mode 100644 include/dt-bindings/reset/tegra114-car.h
--
2.43.0
next reply other threads:[~2025-03-21 9:56 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-21 9:55 Svyatoslav Ryhel [this message]
2025-03-21 9:55 ` [PATCH v1 1/3] drivers: cpufreq: add Tegra 4 support Svyatoslav Ryhel
2025-06-10 11:09 ` Thierry Reding
2025-08-11 8:08 ` Svyatoslav Ryhel
2025-08-22 2:58 ` Mikko Perttunen
2025-08-22 5:21 ` Svyatoslav Ryhel
2025-08-25 3:56 ` Mikko Perttunen
2025-03-21 9:55 ` [PATCH v1 2/3] drivers: clk: tegra: add DFLL support for Tegra 4 Svyatoslav Ryhel
2025-03-21 20:50 ` Krzysztof Kozlowski
2025-05-03 8:54 ` Svyatoslav Ryhel
2025-05-04 16:23 ` Krzysztof Kozlowski
2025-05-04 16:25 ` Svyatoslav Ryhel
2025-05-04 17:11 ` Krzysztof Kozlowski
2025-05-04 17:30 ` Svyatoslav Ryhel
2025-05-04 17:33 ` Krzysztof Kozlowski
2025-06-10 11:07 ` Thierry Reding
2025-06-18 9:13 ` Krzysztof Kozlowski
2025-07-09 15:10 ` Thierry Reding
2025-03-25 18:56 ` Stephen Boyd
2025-03-25 19:00 ` Svyatoslav Ryhel
2025-08-22 2:53 ` Mikko Perttunen
2025-03-21 9:55 ` [PATCH v1 3/3] ARM: tegra: Add DFLL clock support on " Svyatoslav Ryhel
2025-08-22 3:05 ` Mikko Perttunen
2025-08-22 5:19 ` Svyatoslav Ryhel
2025-08-25 4:20 ` Mikko Perttunen
2025-08-25 4:26 ` Svyatoslav
2025-08-26 1:42 ` Mikko Perttunen
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