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From: "Sheetal ." <sheetal@nvidia.com>
To: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<lgirdwood@gmail.com>, <broonie@kernel.org>
Cc: <perex@perex.cz>, <tiwai@suse.com>, <devicetree@vger.kernel.org>,
	<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-sound@vger.kernel.org>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <spujar@nvidia.com>, <mkumard@nvidia.com>,
	Sheetal <sheetal@nvidia.com>
Subject: [PATCH v3 03/11] ASoC: tegra: CIF: Add Tegra264 support
Date: Mon, 12 May 2025 05:17:39 +0000	[thread overview]
Message-ID: <20250512051747.1026770-4-sheetal@nvidia.com> (raw)
In-Reply-To: <20250512051747.1026770-1-sheetal@nvidia.com>

From: Sheetal <sheetal@nvidia.com>

In Tegra264, the CIF register data bit positions are changed for I2S,
AMX, ADX and ADMAIF AHUB modules, as they now support a maximum of
32 channels. tegra264_set_cif API added to set the CIF for IPs supporting
32 channels.

Signed-off-by: Sheetal <sheetal@nvidia.com>
---
 sound/soc/tegra/tegra_cif.h | 30 ++++++++++++++++++++++++++----
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/sound/soc/tegra/tegra_cif.h b/sound/soc/tegra/tegra_cif.h
index 7cca8068f4b5..916aa10d8af8 100644
--- a/sound/soc/tegra/tegra_cif.h
+++ b/sound/soc/tegra/tegra_cif.h
@@ -1,8 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * tegra_cif.h - TEGRA Audio CIF Programming
+/* SPDX-License-Identifier: GPL-2.0-only
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION. All rights reserved.
  *
- * Copyright (c) 2020 NVIDIA CORPORATION.  All rights reserved.
+ * tegra_cif.h - TEGRA Audio CIF Programming
  *
  */
 
@@ -22,6 +21,10 @@
 #define TEGRA_ACIF_CTRL_TRUNCATE_SHIFT		1
 #define TEGRA_ACIF_CTRL_MONO_CONV_SHIFT		0
 
+#define TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT	11
+#define TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT	14
+#define TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT	19
+
 /* AUDIO/CLIENT_BITS values */
 #define TEGRA_ACIF_BITS_8			1
 #define TEGRA_ACIF_BITS_16			3
@@ -62,4 +65,23 @@ static inline void tegra_set_cif(struct regmap *regmap, unsigned int reg,
 	regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
 }
 
+static inline void tegra264_set_cif(struct regmap *regmap, unsigned int reg,
+				    struct tegra_cif_conf *conf)
+{
+	unsigned int value;
+
+	value = (conf->threshold << TEGRA_ACIF_CTRL_FIFO_TH_SHIFT) |
+		((conf->audio_ch - 1) << TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT) |
+		((conf->client_ch - 1) << TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT) |
+		(conf->audio_bits << TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT) |
+		(conf->client_bits << TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT) |
+		(conf->expand << TEGRA_ACIF_CTRL_EXPAND_SHIFT) |
+		(conf->stereo_conv << TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT) |
+		(conf->replicate << TEGRA_ACIF_CTRL_REPLICATE_SHIFT) |
+		(conf->truncate << TEGRA_ACIF_CTRL_TRUNCATE_SHIFT) |
+		(conf->mono_conv << TEGRA_ACIF_CTRL_MONO_CONV_SHIFT);
+
+	regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
+}
+
 #endif
-- 
2.17.1


  parent reply	other threads:[~2025-05-12  5:18 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12  5:17 [PATCH v3 00/11] Add Tegra264 support in AHUB drivers Sheetal .
2025-05-12  5:17 ` [PATCH v3 01/11] dt-bindings: ASoC: admaif: Add missing properties Sheetal .
2025-05-14 21:46   ` Rob Herring (Arm)
2025-05-22 14:25   ` Krzysztof Kozlowski
2025-05-22 16:05     ` Sheetal .
2025-05-12  5:17 ` [PATCH v3 02/11] dt-bindings: ASoC: Document Tegra264 APE support Sheetal .
2025-05-12  5:17 ` Sheetal . [this message]
2025-05-12  5:17 ` [PATCH v3 04/11] ASoC: tegra: ADMAIF: Add Tegra264 support Sheetal .
2025-05-12  5:17 ` [PATCH v3 05/11] ASoC: tegra: ASRC: Update ARAM address Sheetal .
2025-05-12  5:17 ` [PATCH v3 06/11] ASoC: tegra: Update PLL rate for Tegra264 Sheetal .
2025-05-12  5:17 ` [PATCH v3 07/11] ASoC: tegra: I2S: Add Tegra264 support Sheetal .
2025-05-12  5:17 ` [PATCH v3 08/11] ASoC: tegra: AMX: " Sheetal .
2025-05-12  5:17 ` [PATCH v3 09/11] ASoC: tegra: ADX: " Sheetal .
2025-05-12  5:17 ` [PATCH v3 10/11] ASoC: tegra: AHUB: " Sheetal .
2025-05-12  5:17 ` [PATCH v3 11/11] ASoC: tegra: Tegra264 support in isomgr_bw Sheetal .
2025-05-22 14:22 ` [PATCH v3 00/11] Add Tegra264 support in AHUB drivers Mark Brown

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