From: Prathamesh Shete <pshete@nvidia.com>
To: <linus.walleij@linaro.org>, <brgl@bgdev.pl>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <pshete@nvidia.com>
Subject: [PATCH 1/2] dt-bindings: gpio: Add Tegra256 support
Date: Mon, 4 Aug 2025 09:46:56 +0530 [thread overview]
Message-ID: <20250804041657.27688-1-pshete@nvidia.com> (raw)
Extend the existing Tegra186 GPIO controller device tree bindings with
support for the GPIO controller found on Tegra256. The number of pins is
slightly different, but the programming model remains the same
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
---
.../bindings/gpio/nvidia,tegra186-gpio.yaml | 2 ++
include/dt-bindings/gpio/tegra256-gpio.h | 28 +++++++++++++++++++
2 files changed, 30 insertions(+)
create mode 100644 include/dt-bindings/gpio/tegra256-gpio.h
diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml
index 065f5761a93f..2bd620a1099b 100644
--- a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml
@@ -85,6 +85,7 @@ properties:
- nvidia,tegra194-gpio-aon
- nvidia,tegra234-gpio
- nvidia,tegra234-gpio-aon
+ - nvidia,tegra256-gpio
reg-names:
items:
@@ -155,6 +156,7 @@ allOf:
- nvidia,tegra186-gpio
- nvidia,tegra194-gpio
- nvidia,tegra234-gpio
+ - nvidia,tegra256-gpio
then:
properties:
interrupts:
diff --git a/include/dt-bindings/gpio/tegra256-gpio.h b/include/dt-bindings/gpio/tegra256-gpio.h
new file mode 100644
index 000000000000..36485b4bf47d
--- /dev/null
+++ b/include/dt-bindings/gpio/tegra256-gpio.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */
+
+/*
+ ** This header provides constants for binding nvidia,tegra256-gpio*.
+ **
+ ** The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
+ ** provide names for this.
+ **
+ ** The second cell contains standard flag values specified in gpio.h.
+ **/
+
+#ifndef _DT_BINDINGS_GPIO_TEGRA256_GPIO_H
+#define _DT_BINDINGS_GPIO_TEGRA256_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+/* GPIOs implemented by main GPIO controller */
+#define TEGRA256_MAIN_GPIO_PORT_A 0
+#define TEGRA256_MAIN_GPIO_PORT_B 1
+#define TEGRA256_MAIN_GPIO_PORT_C 2
+#define TEGRA256_MAIN_GPIO_PORT_D 3
+
+#define TEGRA256_MAIN_GPIO(port, offset) \
+ ((TEGRA256_MAIN_GPIO_PORT_##port * 8) + (offset))
+
+#endif
+
--
2.17.1
next reply other threads:[~2025-08-04 4:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-04 4:16 Prathamesh Shete [this message]
2025-08-04 4:16 ` [PATCH 2/2] gpio: tegra186: Add support for Tegra256 Prathamesh Shete
2025-08-04 7:37 ` [PATCH 1/2] dt-bindings: gpio: Add Tegra256 support Krzysztof Kozlowski
2025-08-05 6:46 ` Krzysztof Kozlowski
-- strict thread matches above, loose matches on Subject: below --
2025-08-23 5:54 Prathamesh Shete
2025-08-23 13:52 ` Conor Dooley
2025-09-01 8:20 ` Bartosz Golaszewski
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