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[2003:e4:1f27:4600:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b728937cc82sm39812566b.21.2025.11.05.11.53.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Nov 2025 11:53:44 -0800 (PST) From: Thierry Reding To: Thierry Reding , Krzysztof Kozlowski Cc: Rob Herring , Conor Dooley , Jon Hunter , linux-tegra@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: memory: tegra: Document DBB clock for Tegra264 Date: Wed, 5 Nov 2025 20:53:40 +0100 Message-ID: <20251105195342.2705855-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251105195342.2705855-1-thierry.reding@gmail.com> References: <20251105195342.2705855-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Thierry Reding Accesses to external memory are routed through the data backbone (DBB) on Tegra264. A separate clock feeds this path and needs to be enabled whenever an IP block makes an access to external memory. The external memory controller driver is the best place to control this clock since it knows how many devices are actively accessing memory. Document the presence of this clock on Tegra264 only. Signed-off-by: Thierry Reding --- Changes in v2: - add minItems to clocks and clock-names properties .../memory-controllers/nvidia,tegra186-mc.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml index b901f1b3e0fc..7b03b589168b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml @@ -92,10 +92,14 @@ patternProperties: clocks: items: - description: external memory clock + - description: data backbone clock + minItems: 1 clock-names: items: - const: emc + - const: dbb + minItems: 1 "#interconnect-cells": const: 0 @@ -115,6 +119,9 @@ patternProperties: reg: maxItems: 1 + clocks: + maxItems: 1 + - if: properties: compatible: @@ -124,6 +131,9 @@ patternProperties: reg: minItems: 2 + clocks: + maxItems: 1 + - if: properties: compatible: @@ -133,6 +143,9 @@ patternProperties: reg: minItems: 2 + clocks: + maxItems: 1 + - if: properties: compatible: -- 2.51.2