[RFC PATCH v2 0/3] regmap: Add flat_cache_default_is_zero flag for flat cache

[RFC PATCH v2 0/3] regmap: Add flat_cache_default_is_zero flag for flat cache

[Sheetal .]

From: Sheetal <sheetal@nvidia.com>

This patch series adds a flat_cache_default_is_zero flag for REGCACHE_FLAT
that marks cache entries as valid on first read.

For hardware with zero power-on-reset registers, this avoids the need
to add all such registers to reg_defaults (maintenance burden, code
bloat, no functional benefit) just to set the validity bits.

By setting valid bits on read rather than at init, only accessed
registers are marked valid. This keeps regcache_sync scope minimal
and avoids writes to unused registers or holes.

Changes in v2:
- Renamed flag from cache_default_is_zero to flat_cache_default_is_zero
  to make it explicit that this is specific to REGCACHE_FLAT
- Added KUnit test coverage (patch 2/3)
- Updated commit message to explain why valid bits are set on first
  read rather than at init time

Sheetal (3):
  regmap: Add flat_cache_default_is_zero flag for flat cache
  regmap: Add KUnit test for flat_cache_default_is_zero
  ASoC: tegra: Enable flat_cache_default_is_zero for audio drivers

 drivers/base/regmap/internal.h      |  2 ++
 drivers/base/regmap/regcache-flat.c | 12 ++++++++----
 drivers/base/regmap/regcache.c      |  1 +
 drivers/base/regmap/regmap-kunit.c  | 93 ++++++++++++++++++++++++++++++
 include/linux/regmap.h              |  1 +
 sound/soc/tegra/tegra186_asrc.c     |  1 +
 sound/soc/tegra/tegra186_dspk.c     |  1 +
 sound/soc/tegra/tegra210_admaif.c   |  3 +++
 sound/soc/tegra/tegra210_adx.c      |  2 ++
 sound/soc/tegra/tegra210_ahub.c     |  3 +++
 sound/soc/tegra/tegra210_amx.c      |  3 +++
 sound/soc/tegra/tegra210_dmic.c     |  1 +
 sound/soc/tegra/tegra210_i2s.c      |  2 ++
 sound/soc/tegra/tegra210_mbdrc.c    |  1 +
 sound/soc/tegra/tegra210_mixer.c    |  1 +
 sound/soc/tegra/tegra210_mvc.c      |  1 +
 sound/soc/tegra/tegra210_ope.c      |  1 +
 sound/soc/tegra/tegra210_peq.c      |  1 +
 sound/soc/tegra/tegra210_sfc.c      |  1 +
 19 files changed, 127 insertions(+), 4 deletions(-)

-- 
2.34.1

[RFC PATCH v2 1/3] regmap: Add flat_cache_default_is_zero flag for flat cache

[Sheetal .]

From: Sheetal <sheetal@nvidia.com>

Commit e062bdfdd6ad ("regmap: warn users about uninitialized flat
cache") added a warning for drivers using REGCACHE_FLAT when reading
registers not present in reg_defaults.

For hardware where registers have a power-on-reset value of zero
or drivers that wish to treat zero as a valid cache default, adding
all such registers to reg_defaults has drawbacks:

1. Maintenance burden: Drivers must list every readable register
   regardless of its reset value.

2. No functional benefit: Entries like { REG, 0x0 } only set the
   validity bit; the flat cache value is already zero.

3. Code bloat: Large reg_defaults arrays increase driver size.

Add a flat_cache_default_is_zero flag to struct regmap_config. When
set, the flat cache marks registers as valid on first read instead
of warning.

The valid bit is set on first read rather than marking all registers
valid at init time for the following reasons:
- Avoids writes to register holes or unused addresses during sync.
- Safer for drivers that don't have writeable_reg callback defined.

Signed-off-by: Sheetal <sheetal@nvidia.com>
---
 drivers/base/regmap/internal.h      |  2 ++
 drivers/base/regmap/regcache-flat.c | 12 ++++++++----
 drivers/base/regmap/regcache.c      |  1 +
 include/linux/regmap.h              |  1 +
 4 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
index 1477329410ec..xxxxxxxxxxxx 100644
--- a/drivers/base/regmap/internal.h
+++ b/drivers/base/regmap/internal.h
@@ -157,6 +157,8 @@ struct regmap {
 	bool cache_dirty;
 	/* if set, the HW registers are known to match map->reg_defaults */
 	bool no_sync_defaults;
+	/* if set, zero is a valid default for REGCACHE_FLAT cache type registers not in reg_defaults */
+	bool flat_cache_default_is_zero;
 
 	struct reg_sequence *patch;
 	int patch_regs;
diff --git a/drivers/base/regmap/regcache-flat.c b/drivers/base/regmap/regcache-flat.c
index 53cc59c84e2f..xxxxxxxxxxxx 100644
--- a/drivers/base/regmap/regcache-flat.c
+++ b/drivers/base/regmap/regcache-flat.c
@@ -88,10 +88,14 @@ static int regcache_flat_read(struct regmap *map,
 	struct regcache_flat_data *cache = map->cache;
 	unsigned int index = regcache_flat_get_index(map, reg);
 
-	/* legacy behavior: ignore validity, but warn the user */
-	if (unlikely(!test_bit(index, cache->valid)))
-		dev_warn_once(map->dev,
-			"using zero-initialized flat cache, this may cause unexpected behavior");
+	/* legacy behavior: ignore validity, but warn if zero is not a valid default */
+	if (unlikely(!test_bit(index, cache->valid))) {
+		if (map->flat_cache_default_is_zero)
+			set_bit(index, cache->valid);
+		else
+			dev_warn_once(map->dev,
+				      "using zero-initialized flat cache, this may cause unexpected behavior");
+	}
 
 	*value = cache->data[index];
 
diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index 319c342bf5a0..xxxxxxxxxxxx 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -177,6 +177,7 @@ int regcache_init(struct regmap *map, const struct regmap_config *config)
 	map->reg_defaults_raw = config->reg_defaults_raw;
 	map->cache_word_size = BITS_TO_BYTES(config->val_bits);
 	map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
+	map->flat_cache_default_is_zero = config->flat_cache_default_is_zero;
 
 	map->cache = NULL;
 	map->cache_ops = cache_types[i];
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index b0b9be750d93..xxxxxxxxxxxx 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -452,6 +452,7 @@ struct regmap_config {
 	enum regcache_type cache_type;
 	const void *reg_defaults_raw;
 	unsigned int num_reg_defaults_raw;
+	bool flat_cache_default_is_zero;
 
 	unsigned long read_flag_mask;
 	unsigned long write_flag_mask;
-- 
2.34.1

[RFC PATCH v2 2/3] regmap: Add KUnit test for flat_cache_default_is_zero

[Sheetal .]

From: Sheetal <sheetal@nvidia.com>

Add KUnit test coverage for the flat_cache_default_is_zero flag. The
test verifies that when the flag is set:
- Writes in cache_only mode work before registers are marked valid
- Writes in cache_only mode work after registers are marked valid
- After regcache_mark_dirty() and regcache_sync(), cached values
  are correctly written to hardware
- Reads return the cached values

Test command:
  ./tools/testing/kunit/kunit.py run regmap

Test results:
  ============= flat_cache_default_is_zero_flag  =============
  [PASSED] flat-default @0x0
  [PASSED] flat-default fast I/O @0x0
  [PASSED] flat-default @0x2001
  [PASSED] flat-default @0x2002
  ========= [PASSED] flat_cache_default_is_zero_flag =========

Signed-off-by: Sheetal <sheetal@nvidia.com>
---
 drivers/base/regmap/regmap-kunit.c | 87 +++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/drivers/base/regmap/regmap-kunit.c b/drivers/base/regmap/regmap-kunit.c
index f6fc5ed016da..7eec555c449c 100644
--- a/drivers/base/regmap/regmap-kunit.c
+++ b/drivers/base/regmap/regmap-kunit.c
@@ -118,6 +118,15 @@ static const struct regmap_test_param real_cache_types_only_list[] = {
 
 KUNIT_ARRAY_PARAM(real_cache_types_only, real_cache_types_only_list, param_to_desc);
 
+static const struct regmap_test_param flat_cache_types_list[] = {
+	{ .cache = REGCACHE_FLAT, .from_reg = 0 },
+	{ .cache = REGCACHE_FLAT, .from_reg = 0, .fast_io = true },
+	{ .cache = REGCACHE_FLAT, .from_reg = 0x2001 },
+	{ .cache = REGCACHE_FLAT, .from_reg = 0x2002 },
+};
+
+KUNIT_ARRAY_PARAM(flat_cache_types, flat_cache_types_list, param_to_desc);
+
 static const struct regmap_test_param real_cache_types_list[] = {
 	{ .cache = REGCACHE_FLAT,   .from_reg = 0 },
 	{ .cache = REGCACHE_FLAT,   .from_reg = 0, .fast_io = true },
@@ -1517,6 +1526,83 @@ static void cache_present(struct kunit *test)
 		KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, param->from_reg + i));
 }
 
+/*
+ * Test flat_cache_default_is_zero flag behavior.
+ *
+ * When this flag is set on REGCACHE_FLAT, registers not in reg_defaults
+ * are treated as having a default value of zero. This allows drivers to
+ * avoid maintaining large reg_defaults arrays for hardware with zero
+ * power-on-reset values.
+ */
+static void flat_cache_default_is_zero_flag(struct kunit *test)
+{
+	const struct regmap_test_param *param = test->param_value;
+	struct regmap *map;
+	struct regmap_config config;
+	struct regmap_ram_data *data;
+	unsigned int val;
+	int i;
+
+	config = test_regmap_config;
+	config.flat_cache_default_is_zero = true;
+
+	map = gen_regmap(test, &config, &data);
+	KUNIT_ASSERT_FALSE(test, IS_ERR(map));
+	if (IS_ERR(map))
+		return;
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		data->read[param->from_reg + i] = false;
+		data->written[param->from_reg + i] = false;
+	}
+
+	/* Write in cache_only mode before registers are marked valid */
+	regcache_cache_only(map, true);
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param->from_reg + i, i + 0x100));
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_ASSERT_FALSE(test, data->written[param->from_reg + i]);
+
+	regcache_cache_only(map, false);
+	regcache_mark_dirty(map);
+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_ASSERT_TRUE(test, data->written[param->from_reg + i]);
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_EQ(test, i + 0x100, data->vals[param->from_reg + i]);
+
+	/* Verify reads return cached values */
+	for (i = 0; i < BLOCK_TEST_SIZE; i++) {
+		KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param->from_reg + i, &val));
+		KUNIT_EXPECT_EQ(test, i + 0x100, val);
+	}
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		data->written[param->from_reg + i] = false;
+
+	/* Write in cache_only mode after registers are already valid */
+	regcache_cache_only(map, true);
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param->from_reg + i, i + 0x200));
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_ASSERT_FALSE(test, data->written[param->from_reg + i]);
+
+	regcache_cache_only(map, false);
+	regcache_mark_dirty(map);
+	KUNIT_EXPECT_EQ(test, 0, regcache_sync(map));
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_ASSERT_TRUE(test, data->written[param->from_reg + i]);
+
+	for (i = 0; i < BLOCK_TEST_SIZE; i++)
+		KUNIT_EXPECT_EQ(test, i + 0x200, data->vals[param->from_reg + i]);
+}
+
 static void cache_write_zero(struct kunit *test)
 {
 	const struct regmap_test_param *param = test->param_value;
@@ -2078,6 +2164,7 @@ static struct kunit_case regmap_test_cases[] = {
 	KUNIT_CASE_PARAM(cache_present, sparse_cache_types_gen_params),
 	KUNIT_CASE_PARAM(cache_write_zero, sparse_cache_types_gen_params),
 	KUNIT_CASE_PARAM(cache_range_window_reg, real_cache_types_only_gen_params),
+	KUNIT_CASE_PARAM(flat_cache_default_is_zero_flag, flat_cache_types_gen_params),
 
 	KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params),
 	KUNIT_CASE_PARAM(raw_read_defaults, raw_test_types_gen_params),
-- 
2.17.1

[RFC PATCH v2 3/3] ASoC: tegra: Enable flat_cache_default_is_zero for audio drivers

[Sheetal .]

From: Sheetal <sheetal@nvidia.com>

Set flat_cache_default_is_zero flag in Tegra audio driver regmap
configurations.

Tegra APE hardware has numerous registers with zero power-on-reset
values. Use flat_cache_default_is_zero to mark cache entries as valid
instead of adding all these registers to reg_defaults arrays.

This patch depends on:
https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.2844499-1-sheetal@nvidia.com/

Signed-off-by: Sheetal <sheetal@nvidia.com>
---
 sound/soc/tegra/tegra186_asrc.c   | 21 ++++++-----
 sound/soc/tegra/tegra186_dspk.c   | 21 ++++++-----
 sound/soc/tegra/tegra210_admaif.c | 63 ++++++++++++++++---------------
 sound/soc/tegra/tegra210_adx.c    | 42 +++++++++++----------
 sound/soc/tegra/tegra210_ahub.c   | 35 +++++++++--------
 sound/soc/tegra/tegra210_amx.c    | 63 ++++++++++++++++---------------
 sound/soc/tegra/tegra210_dmic.c   | 21 ++++++-----
 sound/soc/tegra/tegra210_i2s.c    | 42 +++++++++++----------
 sound/soc/tegra/tegra210_mbdrc.c  | 25 ++++++------
 sound/soc/tegra/tegra210_mixer.c  | 23 +++++------
 sound/soc/tegra/tegra210_mvc.c    | 21 ++++++-----
 sound/soc/tegra/tegra210_ope.c    | 21 ++++++-----
 sound/soc/tegra/tegra210_peq.c    | 25 ++++++------
 sound/soc/tegra/tegra210_sfc.c    | 23 +++++------
 14 files changed, 234 insertions(+), 212 deletions(-)

diff --git a/sound/soc/tegra/tegra186_asrc.c b/sound/soc/tegra/tegra186_asrc.c
index 2c0220e14a57..5f95b7cb9421 100644
--- a/sound/soc/tegra/tegra186_asrc.c
+++ b/sound/soc/tegra/tegra186_asrc.c
@@ -941,16 +941,17 @@ static bool tegra186_asrc_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra186_asrc_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA186_ASRC_CYA,
-	.writeable_reg		= tegra186_asrc_wr_reg,
-	.readable_reg		= tegra186_asrc_rd_reg,
-	.volatile_reg		= tegra186_asrc_volatile_reg,
-	.reg_defaults		= tegra186_asrc_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra186_asrc_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA186_ASRC_CYA,
+	.writeable_reg			= tegra186_asrc_wr_reg,
+	.readable_reg			= tegra186_asrc_rd_reg,
+	.volatile_reg			= tegra186_asrc_volatile_reg,
+	.reg_defaults			= tegra186_asrc_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra186_asrc_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct tegra_asrc_soc_data soc_data_tegra186 = {
diff --git a/sound/soc/tegra/tegra186_dspk.c b/sound/soc/tegra/tegra186_dspk.c
index a762150db802..4183c8fc124f 100644
--- a/sound/soc/tegra/tegra186_dspk.c
+++ b/sound/soc/tegra/tegra186_dspk.c
@@ -458,16 +458,17 @@ static bool tegra186_dspk_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra186_dspk_regmap = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA186_DSPK_CODEC_CTRL,
-	.writeable_reg		= tegra186_dspk_wr_reg,
-	.readable_reg		= tegra186_dspk_rd_reg,
-	.volatile_reg		= tegra186_dspk_volatile_reg,
-	.reg_defaults		= tegra186_dspk_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra186_dspk_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA186_DSPK_CODEC_CTRL,
+	.writeable_reg			= tegra186_dspk_wr_reg,
+	.readable_reg			= tegra186_dspk_rd_reg,
+	.volatile_reg			= tegra186_dspk_volatile_reg,
+	.reg_defaults			= tegra186_dspk_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra186_dspk_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct of_device_id tegra186_dspk_of_match[] = {
diff --git a/sound/soc/tegra/tegra210_admaif.c b/sound/soc/tegra/tegra210_admaif.c
index f9f6040c4e34..5ecd83517413 100644
--- a/sound/soc/tegra/tegra210_admaif.c
+++ b/sound/soc/tegra/tegra210_admaif.c
@@ -232,42 +232,45 @@ static bool tegra_admaif_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_admaif_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_ADMAIF_LAST_REG,
-	.writeable_reg		= tegra_admaif_wr_reg,
-	.readable_reg		= tegra_admaif_rd_reg,
-	.volatile_reg		= tegra_admaif_volatile_reg,
-	.reg_defaults		= tegra210_admaif_reg_defaults,
-	.num_reg_defaults	= TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1,
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_ADMAIF_LAST_REG,
+	.writeable_reg			= tegra_admaif_wr_reg,
+	.readable_reg			= tegra_admaif_rd_reg,
+	.volatile_reg			= tegra_admaif_volatile_reg,
+	.reg_defaults			= tegra210_admaif_reg_defaults,
+	.num_reg_defaults		= TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1,
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra186_admaif_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA186_ADMAIF_LAST_REG,
-	.writeable_reg		= tegra_admaif_wr_reg,
-	.readable_reg		= tegra_admaif_rd_reg,
-	.volatile_reg		= tegra_admaif_volatile_reg,
-	.reg_defaults		= tegra186_admaif_reg_defaults,
-	.num_reg_defaults	= TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1,
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA186_ADMAIF_LAST_REG,
+	.writeable_reg			= tegra_admaif_wr_reg,
+	.readable_reg			= tegra_admaif_rd_reg,
+	.volatile_reg			= tegra_admaif_volatile_reg,
+	.reg_defaults			= tegra186_admaif_reg_defaults,
+	.num_reg_defaults		= TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1,
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra264_admaif_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA264_ADMAIF_LAST_REG,
-	.writeable_reg		= tegra_admaif_wr_reg,
-	.readable_reg		= tegra_admaif_rd_reg,
-	.volatile_reg		= tegra_admaif_volatile_reg,
-	.reg_defaults		= tegra264_admaif_reg_defaults,
-	.num_reg_defaults	= TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1,
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA264_ADMAIF_LAST_REG,
+	.writeable_reg			= tegra_admaif_wr_reg,
+	.readable_reg			= tegra_admaif_rd_reg,
+	.volatile_reg			= tegra_admaif_volatile_reg,
+	.reg_defaults			= tegra264_admaif_reg_defaults,
+	.num_reg_defaults		= TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1,
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static int tegra_admaif_runtime_suspend(struct device *dev)
diff --git a/sound/soc/tegra/tegra210_adx.c b/sound/soc/tegra/tegra210_adx.c
index 6c9a410085bc..de7f64bd5d75 100644
--- a/sound/soc/tegra/tegra210_adx.c
+++ b/sound/soc/tegra/tegra210_adx.c
@@ -616,29 +616,31 @@ static bool tegra264_adx_volatile_reg(struct device *dev,
 }
 
 static const struct regmap_config tegra210_adx_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_ADX_CFG_RAM_DATA,
-	.writeable_reg		= tegra210_adx_wr_reg,
-	.readable_reg		= tegra210_adx_rd_reg,
-	.volatile_reg		= tegra210_adx_volatile_reg,
-	.reg_defaults		= tegra210_adx_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_adx_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_ADX_CFG_RAM_DATA,
+	.writeable_reg			= tegra210_adx_wr_reg,
+	.readable_reg			= tegra210_adx_rd_reg,
+	.volatile_reg			= tegra210_adx_volatile_reg,
+	.reg_defaults			= tegra210_adx_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_adx_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra264_adx_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA264_ADX_CFG_RAM_DATA,
-	.writeable_reg		= tegra264_adx_wr_reg,
-	.readable_reg		= tegra264_adx_rd_reg,
-	.volatile_reg		= tegra264_adx_volatile_reg,
-	.reg_defaults		= tegra264_adx_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra264_adx_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA264_ADX_CFG_RAM_DATA,
+	.writeable_reg			= tegra264_adx_wr_reg,
+	.readable_reg			= tegra264_adx_rd_reg,
+	.volatile_reg			= tegra264_adx_volatile_reg,
+	.reg_defaults			= tegra264_adx_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra264_adx_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct tegra210_adx_soc_data soc_data_tegra210 = {
diff --git a/sound/soc/tegra/tegra210_ahub.c b/sound/soc/tegra/tegra210_ahub.c
index e795907a3963..e67850dac18d 100644
--- a/sound/soc/tegra/tegra210_ahub.c
+++ b/sound/soc/tegra/tegra210_ahub.c
@@ -2073,28 +2073,31 @@ static bool tegra264_ahub_wr_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_ahub_regmap_config = {
-	.reg_bits		= 32,
-	.val_bits		= 32,
-	.reg_stride		= 4,
-	.max_register		= TEGRA210_MAX_REGISTER_ADDR,
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.val_bits			= 32,
+	.reg_stride			= 4,
+	.max_register			= TEGRA210_MAX_REGISTER_ADDR,
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra186_ahub_regmap_config = {
-	.reg_bits		= 32,
-	.val_bits		= 32,
-	.reg_stride		= 4,
-	.max_register		= TEGRA186_MAX_REGISTER_ADDR,
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.val_bits			= 32,
+	.reg_stride			= 4,
+	.max_register			= TEGRA186_MAX_REGISTER_ADDR,
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra264_ahub_regmap_config = {
-	.reg_bits		= 32,
-	.val_bits		= 32,
-	.reg_stride		= 4,
-	.writeable_reg		= tegra264_ahub_wr_reg,
-	.max_register		= TEGRA264_MAX_REGISTER_ADDR,
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.val_bits			= 32,
+	.reg_stride			= 4,
+	.writeable_reg			= tegra264_ahub_wr_reg,
+	.max_register			= TEGRA264_MAX_REGISTER_ADDR,
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct tegra_ahub_soc_data soc_data_tegra210 = {
diff --git a/sound/soc/tegra/tegra210_amx.c b/sound/soc/tegra/tegra210_amx.c
index c94f8c84e04f..1a7943bb41cc 100644
--- a/sound/soc/tegra/tegra210_amx.c
+++ b/sound/soc/tegra/tegra210_amx.c
@@ -645,42 +645,45 @@ static bool tegra264_amx_volatile_reg(struct device *dev,
 }
 
 static const struct regmap_config tegra210_amx_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_AMX_CFG_RAM_DATA,
-	.writeable_reg		= tegra210_amx_wr_reg,
-	.readable_reg		= tegra210_amx_rd_reg,
-	.volatile_reg		= tegra210_amx_volatile_reg,
-	.reg_defaults		= tegra210_amx_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_amx_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_AMX_CFG_RAM_DATA,
+	.writeable_reg			= tegra210_amx_wr_reg,
+	.readable_reg			= tegra210_amx_rd_reg,
+	.volatile_reg			= tegra210_amx_volatile_reg,
+	.reg_defaults			= tegra210_amx_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_amx_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra194_amx_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA194_AMX_RX4_LAST_FRAME_PERIOD,
-	.writeable_reg		= tegra194_amx_wr_reg,
-	.readable_reg		= tegra194_amx_rd_reg,
-	.volatile_reg		= tegra210_amx_volatile_reg,
-	.reg_defaults		= tegra210_amx_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_amx_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA194_AMX_RX4_LAST_FRAME_PERIOD,
+	.writeable_reg			= tegra194_amx_wr_reg,
+	.readable_reg			= tegra194_amx_rd_reg,
+	.volatile_reg			= tegra210_amx_volatile_reg,
+	.reg_defaults			= tegra210_amx_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_amx_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct regmap_config tegra264_amx_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA264_AMX_RX4_LAST_FRAME_PERIOD,
-	.writeable_reg		= tegra264_amx_wr_reg,
-	.readable_reg		= tegra264_amx_rd_reg,
-	.volatile_reg		= tegra264_amx_volatile_reg,
-	.reg_defaults		= tegra264_amx_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra264_amx_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA264_AMX_RX4_LAST_FRAME_PERIOD,
+	.writeable_reg			= tegra264_amx_wr_reg,
+	.readable_reg			= tegra264_amx_rd_reg,
+	.volatile_reg			= tegra264_amx_volatile_reg,
+	.reg_defaults			= tegra264_amx_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra264_amx_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct tegra210_amx_soc_data soc_data_tegra210 = {
diff --git a/sound/soc/tegra/tegra210_dmic.c b/sound/soc/tegra/tegra210_dmic.c
index 66fff53aeaa6..71b46a86443e 100644
--- a/sound/soc/tegra/tegra210_dmic.c
+++ b/sound/soc/tegra/tegra210_dmic.c
@@ -474,16 +474,17 @@ static bool tegra210_dmic_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_dmic_regmap_config = {
-	.reg_bits = 32,
-	.reg_stride = 4,
-	.val_bits = 32,
-	.max_register = TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
-	.writeable_reg = tegra210_dmic_wr_reg,
-	.readable_reg = tegra210_dmic_rd_reg,
-	.volatile_reg = tegra210_dmic_volatile_reg,
-	.reg_defaults = tegra210_dmic_reg_defaults,
-	.num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
-	.cache_type = REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
+	.writeable_reg			= tegra210_dmic_wr_reg,
+	.readable_reg			= tegra210_dmic_rd_reg,
+	.volatile_reg			= tegra210_dmic_volatile_reg,
+	.reg_defaults			= tegra210_dmic_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_dmic_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static int tegra210_dmic_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra210_i2s.c b/sound/soc/tegra/tegra210_i2s.c
index b91e0e6cd7fe..940d9f6bdc3f 100644
--- a/sound/soc/tegra/tegra210_i2s.c
+++ b/sound/soc/tegra/tegra210_i2s.c
@@ -988,16 +988,17 @@ static bool tegra264_i2s_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_regmap_conf = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_I2S_CYA,
-	.writeable_reg		= tegra210_i2s_wr_reg,
-	.readable_reg		= tegra210_i2s_rd_reg,
-	.volatile_reg		= tegra210_i2s_volatile_reg,
-	.reg_defaults		= tegra210_i2s_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_i2s_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_I2S_CYA,
+	.writeable_reg			= tegra210_i2s_wr_reg,
+	.readable_reg			= tegra210_i2s_rd_reg,
+	.volatile_reg			= tegra210_i2s_volatile_reg,
+	.reg_defaults			= tegra210_i2s_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_i2s_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 /*
@@ -1035,16 +1036,17 @@ static void tegra210_parse_client_convert(struct device *dev)
 }
 
 static const struct regmap_config tegra264_regmap_conf = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA264_I2S_PAD_MACRO_STATUS,
-	.writeable_reg		= tegra264_i2s_wr_reg,
-	.readable_reg		= tegra264_i2s_rd_reg,
-	.volatile_reg		= tegra264_i2s_volatile_reg,
-	.reg_defaults		= tegra264_i2s_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra264_i2s_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA264_I2S_PAD_MACRO_STATUS,
+	.writeable_reg			= tegra264_i2s_wr_reg,
+	.readable_reg			= tegra264_i2s_rd_reg,
+	.volatile_reg			= tegra264_i2s_volatile_reg,
+	.reg_defaults			= tegra264_i2s_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra264_i2s_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static int tegra210_i2s_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra210_mbdrc.c b/sound/soc/tegra/tegra210_mbdrc.c
index 09fe3c5cf540..485fae392741 100644
--- a/sound/soc/tegra/tegra210_mbdrc.c
+++ b/sound/soc/tegra/tegra210_mbdrc.c
@@ -752,18 +752,19 @@ static bool tegra210_mbdrc_precious_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_mbdrc_regmap_cfg = {
-	.name			= "mbdrc",
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_MBDRC_MAX_REG,
-	.writeable_reg		= tegra210_mbdrc_wr_reg,
-	.readable_reg		= tegra210_mbdrc_rd_reg,
-	.volatile_reg		= tegra210_mbdrc_volatile_reg,
-	.precious_reg		= tegra210_mbdrc_precious_reg,
-	.reg_defaults		= tegra210_mbdrc_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_mbdrc_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.name				= "mbdrc",
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_MBDRC_MAX_REG,
+	.writeable_reg			= tegra210_mbdrc_wr_reg,
+	.readable_reg			= tegra210_mbdrc_rd_reg,
+	.volatile_reg			= tegra210_mbdrc_volatile_reg,
+	.precious_reg			= tegra210_mbdrc_precious_reg,
+	.reg_defaults			= tegra210_mbdrc_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_mbdrc_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 int tegra210_mbdrc_hw_params(struct snd_soc_component *cmpnt)
diff --git a/sound/soc/tegra/tegra210_mixer.c b/sound/soc/tegra/tegra210_mixer.c
index ff8e9f2d7abf..b05d1140c689 100644
--- a/sound/soc/tegra/tegra210_mixer.c
+++ b/sound/soc/tegra/tegra210_mixer.c
@@ -598,17 +598,18 @@ static bool tegra210_mixer_precious_reg(struct device *dev,
 }
 
 static const struct regmap_config tegra210_mixer_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_MIXER_CTRL,
-	.writeable_reg		= tegra210_mixer_wr_reg,
-	.readable_reg		= tegra210_mixer_rd_reg,
-	.volatile_reg		= tegra210_mixer_volatile_reg,
-	.precious_reg		= tegra210_mixer_precious_reg,
-	.reg_defaults		= tegra210_mixer_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_mixer_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_MIXER_CTRL,
+	.writeable_reg			= tegra210_mixer_wr_reg,
+	.readable_reg			= tegra210_mixer_rd_reg,
+	.volatile_reg			= tegra210_mixer_volatile_reg,
+	.precious_reg			= tegra210_mixer_precious_reg,
+	.reg_defaults			= tegra210_mixer_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_mixer_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct of_device_id tegra210_mixer_of_match[] = {
diff --git a/sound/soc/tegra/tegra210_mvc.c b/sound/soc/tegra/tegra210_mvc.c
index 779d4c199da9..a0699563a512 100644
--- a/sound/soc/tegra/tegra210_mvc.c
+++ b/sound/soc/tegra/tegra210_mvc.c
@@ -690,16 +690,17 @@ static bool tegra210_mvc_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_mvc_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_MVC_CONFIG_ERR_TYPE,
-	.writeable_reg		= tegra210_mvc_wr_reg,
-	.readable_reg		= tegra210_mvc_rd_reg,
-	.volatile_reg		= tegra210_mvc_volatile_reg,
-	.reg_defaults		= tegra210_mvc_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_mvc_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_MVC_CONFIG_ERR_TYPE,
+	.writeable_reg			= tegra210_mvc_wr_reg,
+	.readable_reg			= tegra210_mvc_rd_reg,
+	.volatile_reg			= tegra210_mvc_volatile_reg,
+	.reg_defaults			= tegra210_mvc_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_mvc_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct of_device_id tegra210_mvc_of_match[] = {
diff --git a/sound/soc/tegra/tegra210_ope.c b/sound/soc/tegra/tegra210_ope.c
index 27db70af2746..6a1c05829b4b 100644
--- a/sound/soc/tegra/tegra210_ope.c
+++ b/sound/soc/tegra/tegra210_ope.c
@@ -288,16 +288,17 @@ static bool tegra210_ope_volatile_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_ope_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_OPE_DIR,
-	.writeable_reg		= tegra210_ope_wr_reg,
-	.readable_reg		= tegra210_ope_rd_reg,
-	.volatile_reg		= tegra210_ope_volatile_reg,
-	.reg_defaults		= tegra210_ope_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_ope_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_OPE_DIR,
+	.writeable_reg			= tegra210_ope_wr_reg,
+	.readable_reg			= tegra210_ope_rd_reg,
+	.volatile_reg			= tegra210_ope_volatile_reg,
+	.reg_defaults			= tegra210_ope_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_ope_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static int tegra210_ope_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra210_peq.c b/sound/soc/tegra/tegra210_peq.c
index 9a05e6913276..0f90a9d27f2e 100644
--- a/sound/soc/tegra/tegra210_peq.c
+++ b/sound/soc/tegra/tegra210_peq.c
@@ -295,18 +295,19 @@ static bool tegra210_peq_precious_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_peq_regmap_config = {
-	.name			= "peq",
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_PEQ_CFG_RAM_SHIFT_DATA,
-	.writeable_reg		= tegra210_peq_wr_reg,
-	.readable_reg		= tegra210_peq_rd_reg,
-	.volatile_reg		= tegra210_peq_volatile_reg,
-	.precious_reg		= tegra210_peq_precious_reg,
-	.reg_defaults		= tegra210_peq_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_peq_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.name				= "peq",
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_PEQ_CFG_RAM_SHIFT_DATA,
+	.writeable_reg			= tegra210_peq_wr_reg,
+	.readable_reg			= tegra210_peq_rd_reg,
+	.volatile_reg			= tegra210_peq_volatile_reg,
+	.precious_reg			= tegra210_peq_precious_reg,
+	.reg_defaults			= tegra210_peq_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_peq_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 void tegra210_peq_restore(struct regmap *regmap, u32 *biquad_gains,
diff --git a/sound/soc/tegra/tegra210_sfc.c b/sound/soc/tegra/tegra210_sfc.c
index d6341968bebe..4aee0a86c5dc 100644
--- a/sound/soc/tegra/tegra210_sfc.c
+++ b/sound/soc/tegra/tegra210_sfc.c
@@ -3559,17 +3559,18 @@ static bool tegra210_sfc_precious_reg(struct device *dev, unsigned int reg)
 }
 
 static const struct regmap_config tegra210_sfc_regmap_config = {
-	.reg_bits		= 32,
-	.reg_stride		= 4,
-	.val_bits		= 32,
-	.max_register		= TEGRA210_SFC_CFG_RAM_DATA,
-	.writeable_reg		= tegra210_sfc_wr_reg,
-	.readable_reg		= tegra210_sfc_rd_reg,
-	.volatile_reg		= tegra210_sfc_volatile_reg,
-	.precious_reg		= tegra210_sfc_precious_reg,
-	.reg_defaults		= tegra210_sfc_reg_defaults,
-	.num_reg_defaults	= ARRAY_SIZE(tegra210_sfc_reg_defaults),
-	.cache_type		= REGCACHE_FLAT,
+	.reg_bits			= 32,
+	.reg_stride			= 4,
+	.val_bits			= 32,
+	.max_register			= TEGRA210_SFC_CFG_RAM_DATA,
+	.writeable_reg			= tegra210_sfc_wr_reg,
+	.readable_reg			= tegra210_sfc_rd_reg,
+	.volatile_reg			= tegra210_sfc_volatile_reg,
+	.precious_reg			= tegra210_sfc_precious_reg,
+	.reg_defaults			= tegra210_sfc_reg_defaults,
+	.num_reg_defaults		= ARRAY_SIZE(tegra210_sfc_reg_defaults),
+	.cache_type			= REGCACHE_FLAT,
+	.flat_cache_default_is_zero	= true,
 };
 
 static const struct of_device_id tegra210_sfc_of_match[] = {
-- 
2.17.1

Re: [RFC PATCH v2 3/3] ASoC: tegra: Enable flat_cache_default_is_zero for audio drivers

[Mark Brown]

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On Mon, Jan 12, 2026 at 09:58:41AM +0530, Sheetal . wrote:
> From: Sheetal <sheetal@nvidia.com>
> 
> Set flat_cache_default_is_zero flag in Tegra audio driver regmap
> configurations.

This doesn't apply against current code, please check and resend.

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Re: [RFC PATCH v2 3/3] ASoC: tegra: Enable flat_cache_default_is_zero for audio drivers

[Sheetal .]

On 12-01-2026 17:56, Mark Brown wrote:
> On Mon, Jan 12, 2026 at 09:58:41AM +0530, Sheetal . wrote:
>> From: Sheetal <sheetal@nvidia.com>
>>
>> Set flat_cache_default_is_zero flag in Tegra audio driver regmap
>> configurations.
> 
> This doesn't apply against current code, please check and resend.

As mentioned in the commit message,

This patch depends on:
https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.2844499-1-sheetal@nvidia.com/.

Kindly let me know if any additional action is required on my part.

Regards,
Sheetal

Re: [RFC PATCH v2 3/3] ASoC: tegra: Enable flat_cache_default_is_zero for audio drivers

[Mark Brown]

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On Mon, Jan 12, 2026 at 06:23:39PM +0530, Sheetal . wrote:
> On 12-01-2026 17:56, Mark Brown wrote:

> > This doesn't apply against current code, please check and resend.

> As mentioned in the commit message,

> This patch depends on:
> https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.2844499-1-sheetal@nvidia.com/.

Please include human readable descriptions of things like commits and
issues being discussed in e-mail in your mails, this makes them much
easier for humans to read especially when they have no internet access.
I do frequently catch up on my mail on flights or while otherwise
travelling so this is even more pressing for me than just being about
making things a bit easier to read.

> Kindly let me know if any additional action is required on my part.

Please resend when the dependencies are lined up.

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Re: [RFC PATCH v2 1/3] regmap: Add flat_cache_default_is_zero flag for flat cache

[Sander Vanheule]

Hi,

On Mon, 2026-01-12 at 09:58 +0530, Sheetal . wrote:
> From: Sheetal <sheetal@nvidia.com>
> 
> Commit e062bdfdd6ad ("regmap: warn users about uninitialized flat
> cache") added a warning for drivers using REGCACHE_FLAT when reading
> registers not present in reg_defaults.
> 
> For hardware where registers have a power-on-reset value of zero
> or drivers that wish to treat zero as a valid cache default, adding
> all such registers to reg_defaults has drawbacks:
> 
> 1. Maintenance burden: Drivers must list every readable register
>    regardless of its reset value.

If you would extend regmap_config to accept a callback for defaults, this burden
could be reduced to near-zero if it was a simple wrapper for the writeable_regs
and/or readable_regs callbacks. I.e. "return 0x0 if readable or writable".


> 2. No functional benefit: Entries like { REG, 0x0 } only set the
>    validity bit; the flat cache value is already zero.

There is a functional benefit: it allows regmap_sync() to do what it is supposed
to do: check if a cached register matches the reset value to omit writing the
cached value to hardware after a reset.


> 3. Code bloat: Large reg_defaults arrays increase driver size.

As I argued before, bloat would be limited if the user could provide tables or
callbacks for defaults.

> 
> Add a flat_cache_default_is_zero flag to struct regmap_config. When
> set, the flat cache marks registers as valid on first read instead
> of warning.
> 
> The valid bit is set on first read rather than marking all registers
> valid at init time for the following reasons:
> - Avoids writes to register holes or unused addresses during sync.
> - Safer for drivers that don't have writeable_reg callback defined.

These are benefits of using a sparse cache, but on closer inspection don't
actually apply here. You can validate this in your kunit test if you also do the
negative check: assert that registers outside of the written range are left
untouched (written == 0).

Because regcache_read() will never return -ENOENT with this option enabled,
regmap_sync() will see all registers as "written". Since there are no defaults
to check against, this will cause regmap_sync() to write to *all* writable
registers. With this patch, you are just reverting to the old behaviour where
regmap_sync() silently overwrites registers you never accessed with 0.


Best,
Sander

Re: [RFC PATCH v2 1/3] regmap: Add flat_cache_default_is_zero flag for flat cache

[Mark Brown]

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On Mon, Jan 12, 2026 at 08:09:33PM +0100, Sander Vanheule wrote:
> On Mon, 2026-01-12 at 09:58 +0530, Sheetal . wrote:

> > 1. Maintenance burden: Drivers must list every readable register
> >    regardless of its reset value.

> If you would extend regmap_config to accept a callback for defaults, this burden
> could be reduced to near-zero if it was a simple wrapper for the writeable_regs
> and/or readable_regs callbacks. I.e. "return 0x0 if readable or writable".

That does seem like a good idea.

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