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Mon, 12 Jan 2026 21:49:38 -0800 From: Ashish Mhetre To: , , , , , , CC: , , , , , , , , , Ashish Mhetre Subject: [PATCH V8 0/4] Add device tree support for NVIDIA Tegra CMDQV Date: Tue, 13 Jan 2026 05:49:31 +0000 Message-ID: <20260113054935.1945785-1-amhetre@nvidia.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE35:EE_|MN0PR12MB5833:EE_ X-MS-Office365-Filtering-Correlation-Id: 3357a5cb-957e-4e07-758f-08de52679185 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?l8tTDW9E0b7bHW9Idm/A4UQcgqKe9BAjUQlHc6zO0OAqmjUdLnw4FKiGUYJv?= =?us-ascii?Q?cheuojGHWkOn+JUHyT58rU9dAfI/VwtyD/i0G5iHB0ciw3NhYUEyxfmyBeT/?= =?us-ascii?Q?Ise3nR955PaMvHKDtC5JX+zcv+rRzhDoBy3BaXfDS+24fvfmxwoUW+8dZ8H9?= =?us-ascii?Q?XiOdnng3gLzCLW0UvT0ppcpYDqq+ODqR6nM06h8YVYsHu4B1n70hU528ldYq?= =?us-ascii?Q?zrf0MXqHINHHiztt9iBPr0NTp7krFp4IM/E3vTIf0tWLqgGvbZBtsq1X6ESI?= =?us-ascii?Q?o73vUhpRROL55Ux3cdNsw+LxAoufPFMv1bq/wbCpvC9Pi3sjIKbwWgl/uotF?= =?us-ascii?Q?T/wOCxGQszRyYzoy0C5LfP/9KllqGRf/sbGdeW9L1FJj5c34FM7t6ArKYpU6?= =?us-ascii?Q?FhrkPauMyy/HiAGRNwJvMOmX8CLHAOt5w85aZAMIv8hzCgsGMXaK8Jd1VjAF?= =?us-ascii?Q?vJqEL6eOZZ1hmKocinbmUHTnJj36tNm4O1nLMgJOSuZT5zN0ifM8S14JgUyE?= =?us-ascii?Q?mQPKIJgNBKXEvsM/TV4+R8rAonb2LUmim5udaK6HrFiM95l2VQeuZsC1L6NL?= =?us-ascii?Q?GQcTB3I8TPzBX9Mb9C02zH906oCIKSowye9cgy1NlfgIHWZBAQMV6jXiujg+?= =?us-ascii?Q?x8qB3TjgpHCSXtvO4aExxPCEwOGrtEMMtMtV1jDruioPCTinStOS6IBnMS2s?= =?us-ascii?Q?nW1wqGlgT8FxqsZn9BETXN6BuPzCqG2csvfSTRbPg1a+r+/giOc5T6Ymj3pt?= =?us-ascii?Q?NbV3OJX5dcpa7roROWHbeYmGLleNMOWZMaSiQkltL8b26P640dWNTRWU6cSq?= =?us-ascii?Q?3A7miOH2MZQmlYIl4KsxN9BVKiBxvaoaFFxOWkOEZdDePatfUv3qOBw9fzss?= =?us-ascii?Q?XRsogoulmqKPBhtq+9YA0QbN977uEOEGBptvErGkOu+O3qImFwGuGjhkUuBy?= =?us-ascii?Q?kSMSM9+UAO95NPWBGJUGQwqF5LGqSQJ1XeS4itpFv0eK2KQ7SBQjCC741pM9?= =?us-ascii?Q?hkZ8Xp1vVPp/b6di8moQmAnWLZHe66eW2MAkUeC0it9mllWOHQX3ME/TV9oD?= =?us-ascii?Q?n4uZSsp2ypd5IK30roaQBCUMnXBmXwvcBMraGR5KVPiRe2oTSsISeIuCK4Au?= =?us-ascii?Q?MEdsBRMbLPqRmHCCHWRgDbc+lEpyADrNJnWtO+8l0OdoBIsWrkGbXriOtlgw?= =?us-ascii?Q?NsTYGAoFmcm1PwyGmbV0lZlqk5whmhs7rQGo0jUMOc9dPRfqKeigLkAszp/9?= =?us-ascii?Q?P/uCg9L85mHd0tYpNyDp3r3L8bALq40yLK0wNuyJAGu5a+mok2pSorTEVpLT?= =?us-ascii?Q?qzl62QEmBHgxgC1SCcgPWBX71Agh1guccb6gqGumOoHQAYqfWVvtfvWUp40P?= =?us-ascii?Q?s9ILIp1I6M1f/RWvElcZBiFwmd9E7gsdKtn2w9fBKDHz8Pal7Hdtlfh/0kwj?= =?us-ascii?Q?MKHthtc1w6lEvwPApP03l/kYLedA89F5h+MsnUMBeL/WE7Kks7Kgw4BIdW7y?= =?us-ascii?Q?FCkU3khrS9zE2Y5yt87QmM2noFuos0TLQ1M/uT7pefyNHIlvD/LRQOn7y9Tt?= =?us-ascii?Q?484bjc97FGmKpSehEL4=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2026 05:49:50.8783 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3357a5cb-957e-4e07-758f-08de52679185 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE35.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5833 This series adds device tree support for the CMDQ-Virtualization (CMDQV) hardware on NVIDIA Tegra264 SoCs. CMDQV is a hardware block that works alongside the ARM SMMUv3 to assist in virtualizing the command queue. It was previously only supported through ACPI on Tegra241. This series extends the existing driver to support device tree based initialization, which is required for Tegra264 platforms. The series is structured as follows: Patch 1: Decouple tegra241-cmdqv driver from ACPI by replacing all the ACPI functions with standard platform functions. Patch 2: Extends the tegra241-cmdqv driver to support device tree probing alongside the existing ACPI support. The SMMU driver now parses the nvidia,cmdqv phandle to associate each SMMU with its corresponding CMDQV instance. Patch 3: Adds device tree binding documentation for nvidia,tegra264-cmdqv and extends the arm,smmu-v3 binding with an optional nvidia,cmdqv property. Patch 4: Adds CMDQV device nodes to the Tegra264 device tree and enables them on the tegra264-p3834 platform. The implementation follows the existing ACPI probe path to minimize code divergence and maintain consistency with Tegra241 support. Changes in V8: - Changed CMDQV device print from info to debug. - Removed the CMDQV example for Nvidia from arm-smmu-v3 bindings yaml. Changes in V7: - Hold reference on platform device (impl_dev) and drop ref on ACPI device (adev). Changes in V6: - Added Nicolin's patch for decoupling tegra241-cmdqv from ACPI and rebased other patches on top of it. - Removed put_device() from DT path as tegra241-cmdqv driver takes care of dropping reference in remove callback. Changes in V5: - Guard ACPI functions with CONFIG_ACPI to fix build without ACPI. Changes in V4: - Removed platform driver registration from tegra241-cmdqv.c to avoid duplicate module init/cleanup symbols - Fixed the ordering of properties in CMDQV device tree nodes - Added "Reviewed-by: Rob Herring" for binding documentation patch(2/3) carry-forwarding from V3. Changes in V3: - Remove the Kconfig dependency for CONFIG_TEGRA241_CMDQV - Drop the reference on the platform device after getting it from of_find_device_by_node() - Remove the unnecessary "nvidia,tegra264-smmu" compatible string from arm-smmu-v3 match table - Order CMDQV nodes in device tree files according to its address Changes in V2: - Updated dependency for CONFIG_TEGRA241_CMDQV on OF || ACPI - Changed maintainer to Nicolin Chen - Removed interrupt-names property Ashish Mhetre (3): iommu/arm-smmu-v3: Add device-tree support for CMDQV driver dt-bindings: iommu: Add NVIDIA Tegra CMDQV support arm64: dts: nvidia: Add nodes for CMDQV Nicolin Chen (1): iommu/tegra241-cmdqv: Decouple driver from ACPI .../bindings/iommu/arm,smmu-v3.yaml | 27 +++++- .../bindings/iommu/nvidia,tegra264-cmdqv.yaml | 42 ++++++++++ .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 8 ++ arch/arm64/boot/dts/nvidia/tegra264.dtsi | 50 +++++++++-- drivers/iommu/arm/Kconfig | 1 - drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 35 +++++++- .../iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 84 +++---------------- 7 files changed, 167 insertions(+), 80 deletions(-) create mode 100644 Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml -- 2.25.1