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Fri, 30 Jan 2026 04:49:54 -0800 (PST) Received: from xeon ([188.163.112.49]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-435e10e4757sm22738783f8f.5.2026.01.30.04.49.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jan 2026 04:49:54 -0800 (PST) From: Svyatoslav Ryhel To: Thierry Reding , Mikko Perttunen , David Airlie , Simona Vetter , Jonathan Hunter , Sowjanya Komatineni , Luca Ceresoli , Mauro Carvalho Chehab , Greg Kroah-Hartman , Hans Verkuil , Svyatoslav Ryhel Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH v6 00/15] tegra-video: add CSI support for Tegra20 and Tegra30 Date: Fri, 30 Jan 2026 14:49:17 +0200 Message-ID: <20260130124932.351328-1-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along with a set of changes required for that. --- Changes in v2: - vi_sensor gated through csus - TEGRA30_CLK_CLK_MAX moved to clk-tegra30 - adjusted commit titles and messages - clk_register_clkdev dropped from pad clock registration - removed tegra30-vi/vip and used tegra20 fallback - added separate csi schema for tegra20-csi and tegra30-csi - fixet number of VI channels - adjusted tegra_vi_out naming - fixed yuv_input_format to main_input_format - MIPI calibration refsctored for Tegra114+ and added support for pre-Tegra114 to use CSI as a MIPI calibration device - switched ENOMEM to EBUSY - added check into tegra_channel_get_remote_csi_subdev - moved avdd-dsi-csi-supply into CSI - next_fs_sp_idx > next_fs_sp_value - removed host1x_syncpt_incr from framecounted syncpoint - csi subdev request moved before frame cycle Changes in v3: - tegra20 and tegra30 csi schema merged - removed unneeded properties and requirements from schema - improved vendor specific properties description - added tegra20 csus parent mux - improved commit descriptions - redesigned MIPI-calibration to expose less SoC related data into header - commit "staging: media: tegra-video: csi: add support for SoCs with integrated MIPI calibration" dropped as unneeded - improved tegra_channel_get_remote_device_subdev logic - avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000 - software syncpoint counters switched to direct reading - adjusted planar formats offset calculation Changes in v4: - removed ifdefs from tegra_mipi_driver - document Tegra132 MIPI calibration device - switched to use BIT macro in tegra114-mipi - pinctrl changes moved to a separate patch - ERESTARTSYS workaround preserved for now - tegra_mipi_add_provider replaced with devm_tegra_mipi_add_provider - reworked bytesperline and sizeimage calculaion Changes in v5: - dropped patch 1/24 of v4 since it was picked to pinctrl tree - added reasoning for tegra132 comaptible into commit desctiption - moved clocks into common section in tegra20-csi schema - added note regarding ERESTARTSYS Changes in v6: - dropped patches 1, 2, 3, 4, 10, 13, 21, 22 of v5 since they were picked - rebased on top of linux next/master - improved description of commit "staging: media: tegra-video: vi: adjust get_selection operation check" --- Svyatoslav Ryhel (15): staging: media: tegra-video: expand VI and VIP support to Tegra30 staging: media: tegra-video: vi: adjust get_selection operation check staging: media: tegra-video: vi: add flip controls only if no source controls are provided staging: media: tegra-video: csi: move CSI helpers to header gpu: host1x: convert MIPI to use operation function pointers staging: media: tegra-video: vi: improve logic of source requesting staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to CSI staging: media: tegra-video: tegra20: set correct maximum width and height staging: media: tegra-video: tegra20: add support for second output of VI staging: media: tegra-video: tegra20: adjust format align calculations staging: media: tegra-video: tegra20: set VI HW revision staging: media: tegra-video: tegra20: increase maximum VI clock frequency staging: media: tegra-video: tegra20: expand format support with RAW8/10 and YUV422/YUV420p 1X16 staging: media: tegra-video: tegra20: adjust luma buffer stride staging: media: tegra-video: add CSI support for Tegra20 and Tegra30 drivers/gpu/drm/tegra/dsi.c | 1 + drivers/gpu/host1x/Makefile | 1 + drivers/gpu/host1x/mipi.c | 525 ++----------- drivers/gpu/host1x/tegra114-mipi.c | 483 ++++++++++++ drivers/staging/media/tegra-video/Makefile | 1 + drivers/staging/media/tegra-video/csi.c | 64 +- drivers/staging/media/tegra-video/csi.h | 22 + drivers/staging/media/tegra-video/tegra20.c | 820 +++++++++++++++++--- drivers/staging/media/tegra-video/vi.c | 58 +- drivers/staging/media/tegra-video/vi.h | 6 +- drivers/staging/media/tegra-video/video.c | 8 +- drivers/staging/media/tegra-video/vip.c | 2 +- drivers/staging/media/tegra-video/vip.h | 2 +- include/linux/host1x.h | 10 - include/linux/tegra-mipi-cal.h | 57 ++ 15 files changed, 1415 insertions(+), 645 deletions(-) create mode 100644 drivers/gpu/host1x/tegra114-mipi.c create mode 100644 include/linux/tegra-mipi-cal.h -- 2.51.0