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Mon, 02 Feb 2026 00:05:51 -0800 (PST) From: Svyatoslav Ryhel To: Greg Kroah-Hartman , Mikko Perttunen , Thierry Reding , Jonathan Hunter , Svyatoslav Ryhel Cc: linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/4] usb: phy: tegra: parametrize HSIC PTS value Date: Mon, 2 Feb 2026 10:05:25 +0200 Message-ID: <20260202080526.23487-4-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260202080526.23487-1-clamor95@gmail.com> References: <20260202080526.23487-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The parallel transceiver select used in HSIC mode differs on Tegra20, where it uses the UTMI value (0), whereas Tegra30+ uses a dedicated HSIC value. Reflect this in the SoC config. Signed-off-by: Svyatoslav Ryhel --- drivers/usb/phy/phy-tegra-usb.c | 7 +++---- include/linux/usb/tegra_usb_phy.h | 2 ++ 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c index 6173b240c3ea..812d99443180 100644 --- a/drivers/usb/phy/phy-tegra-usb.c +++ b/drivers/usb/phy/phy-tegra-usb.c @@ -957,10 +957,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy) writel_relaxed(val, base + USB_USBMODE); } - if (phy->soc_config->has_hostpc) - set_pts(phy, TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC); - else - set_pts(phy, 0); + set_pts(phy, phy->soc_config->uhsic_pts_value); val = readl_relaxed(base + USB_TXFILLTUNING); if ((val & USB_FIFO_TXFILL_MASK) != USB_FIFO_TXFILL_THRES(0x10)) { @@ -1474,6 +1471,7 @@ static const struct tegra_phy_soc_config tegra20_soc_config = { .requires_pmc_ao_power_up = false, .uhsic_registers_offset = 0, .uhsic_tx_rtune = 0, /* 40 ohm */ + .uhsic_pts_value = 0, /* UTMI */ }; static const struct tegra_phy_soc_config tegra30_soc_config = { @@ -1484,6 +1482,7 @@ static const struct tegra_phy_soc_config tegra30_soc_config = { .requires_pmc_ao_power_up = true, .uhsic_registers_offset = 0x400, .uhsic_tx_rtune = 8, /* 50 ohm */ + .uhsic_pts_value = TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC, }; static const struct of_device_id tegra_usb_phy_id_table[] = { diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h index fbdd2dcb3a2b..81d9f22e58b5 100644 --- a/include/linux/usb/tegra_usb_phy.h +++ b/include/linux/usb/tegra_usb_phy.h @@ -27,6 +27,7 @@ struct gpio_desc; * uhsic_registers_offset: for Tegra30+ where HSIC registers were offset * comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2 * uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver + * uhsic_pts_value: parallel transceiver select enumeration value */ struct tegra_phy_soc_config { @@ -37,6 +38,7 @@ struct tegra_phy_soc_config { bool requires_pmc_ao_power_up; u32 uhsic_registers_offset; u32 uhsic_tx_rtune; + u32 uhsic_pts_value; }; struct tegra_utmip_config { -- 2.51.0