From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: "Niklas Cassel" <cassel@kernel.org>,
"Vidya Sagar" <vidyas@nvidia.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Arnd Bergmann" <arnd@arndb.de>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Kunihiko Hayashi" <hayashi.kunihiko@socionext.com>,
"Masami Hiramatsu" <mhiramat@kernel.org>
Cc: Manikanta Maddireddy <mmaddireddy@nvidia.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-tegra@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 1/4] PCI: endpoint: Add BAR_DISABLED and document BAR_RESERVED semantics
Date: Tue, 17 Feb 2026 11:24:41 +0530 [thread overview]
Message-ID: <20260217-master-v1-1-727e26cdfaf5@nvidia.com> (raw)
In-Reply-To: <20260217-master-v1-0-727e26cdfaf5@nvidia.com>
Add BAR_DISABLED to enum pci_epc_bar_type for BARs that are unused: the
EPC must disable them in .init(), the EPF must not use them, and they
are not returned by pci_epc_get_next_free_bar().
Document BAR_RESERVED for two uses: (1) HW-backed BARs (e.g. MSI-X
table, DMA regs) that the EPC may leave enabled for the host, and
(2) the second register of a 64-bit BAR (high 32 bits) when the
preceding BAR has only_64bit set.
Update pci_epc_get_next_free_bar() to treat both BAR_RESERVED and
BAR_DISABLED as not free so EPF drivers do not allocate or use
these BARs.
This allows EPC drivers such as Tegra194 to keep HW-backed 64-bit
BARs (MSI-X, DMA) enabled while still preventing EPF from using
reserved or disabled BARs.
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
drivers/pci/endpoint/pci-epc-core.c | 5 +++--
include/linux/pci-epc.h | 13 +++++++++++--
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index ca7f19cc973a..1d6b04ac4fc5 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -103,8 +103,9 @@ enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
bar++;
for (i = bar; i < PCI_STD_NUM_BARS; i++) {
- /* If the BAR is not reserved, return it. */
- if (epc_features->bar[i].type != BAR_RESERVED)
+ /* If the BAR is not reserved or disabled, return it. */
+ if (epc_features->bar[i].type != BAR_RESERVED &&
+ epc_features->bar[i].type != BAR_DISABLED)
return i;
}
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index 4286bfdbfdfa..9b3714a0dafc 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -191,13 +191,21 @@ struct pci_epc {
* @BAR_RESIZABLE: The BAR implements the PCI-SIG Resizable BAR Capability.
* NOTE: An EPC driver can currently only set a single supported
* size.
- * @BAR_RESERVED: The BAR should not be touched by an EPF driver.
+ * @BAR_RESERVED: The BAR should not be touched by an EPF driver. Used for:
+ * (1) HW-backed BARs (e.g. MSI-X table, DMA regs) that the EPC
+ * may leave enabled for the host; (2) the second register
+ * of a 64-bit BAR (the high 32 bits), when the preceding
+ * BAR has only_64bit set.
+ * @BAR_DISABLED: The BAR is unused; the EPC must disable it in .init(); the
+ * EPF must not use it; it is not returned by
+ * pci_epc_get_next_free_bar().
*/
enum pci_epc_bar_type {
BAR_PROGRAMMABLE = 0,
BAR_FIXED,
BAR_RESIZABLE,
BAR_RESERVED,
+ BAR_DISABLED,
};
/**
@@ -212,7 +220,8 @@ enum pci_epc_bar_type {
* only_64bit should not be set on a BAR of type BAR_RESERVED.
* (If BARx is a 64-bit BAR that an EPF driver is not allowed to
* touch, then both BARx and BARx+1 must be set to type
- * BAR_RESERVED.)
+ * BAR_RESERVED. BAR_RESERVED is used both for HW-backed BARs and
+ * for the high half of a 64-bit BAR.)
*/
struct pci_epc_bar_desc {
enum pci_epc_bar_type type;
--
2.34.1
next prev parent reply other threads:[~2026-02-17 5:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-17 5:54 [PATCH 0/4] PCI: endpoint: Add BAR_DISABLED support to PCI endpoint framework Manikanta Maddireddy
2026-02-17 5:54 ` Manikanta Maddireddy [this message]
2026-02-17 5:54 ` [PATCH 2/4] PCI: tegra194: Use 64-bit BAR layout and reset only first BAR in EP mode Manikanta Maddireddy
2026-02-17 5:54 ` [PATCH 3/4] misc: pci_endpoint_test: Add BAR skip mask and NVIDIA Tegra EP device IDs Manikanta Maddireddy
2026-02-17 5:54 ` [PATCH 4/4] PCI: uniphier-ep: Convert unused BAR_RESERVED to BAR_DISABLED for Pro5 Manikanta Maddireddy
2026-02-17 6:08 ` [PATCH 0/4] PCI: endpoint: Add BAR_DISABLED support to PCI endpoint framework Manikanta Maddireddy
2026-02-17 21:38 ` Niklas Cassel
2026-02-23 3:28 ` Manikanta Maddireddy
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