From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 579AD28C006; Tue, 17 Feb 2026 21:28:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771363681; cv=none; b=T5OTc2QQUvx82HrBTBtFg1bOCp1SWaCW9GwSKj0/tzVEENpX915Ndrz9WkBHgkKLnNB/H6q6XnHikZZSlo2J1kf8Z4gJTWIvwoS/PT4H8P2Rae+YCm/ZJK88AmHPa5gnvE7pfwxTyhPoguvsADOJKTZ8h6cRb4tGy1ll8NC+cU8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771363681; c=relaxed/simple; bh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YnQGVYxfRs849f8qhJbX1ffv+CAUJlND1hhLu3rlrOlFaF+oQSz0ZiazbEh7uafAbIzEN2hU/xGd2B2Dylh2t6Wzk5w1Y6ZBk3rSsdcRWIwf95xEu2Z53E96iAGJaBNQZ6DHlwU0BH2x14UUGhspQbENuIxEq8kXgjafmqlHI8I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dFAPruJ7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dFAPruJ7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B5605C4CEF7; Tue, 17 Feb 2026 21:27:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771363681; bh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dFAPruJ7oNmB/6OQ2buMqtV2VMS9EVMtiTfMkhszpe1fAfZXUoCT9eLz0e2a4qtd2 SmaahcBBn74i2BHuv+RpTlb4Okud8413t0Y1CfJ6g+CUNG7nO1bawQekMUSdSLlAhP BNIZxANMEfkRq+OidscQlDaHXTsGqlN1IjKa0YoePQElNH8pPYRyy1UPID+ud1FC/8 9iCHg/2yCGtzLvGDj9RIIAPrZSyHGDw38gAHXMOdd5dsn94JyfO9/LPfr7OeJ+XxMD zTWEt/iw0XvgHJvDC/xi8AE41mPAv5F6USPv04JG6Z6mgLAwzCd2IKkOYPGJ6t/VVU YOOUSmCHFLLpg== From: Niklas Cassel To: Richard Zhu , Lucas Stach , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Marek Vasut , Yoshihiro Shimoda , Geert Uytterhoeven , Magnus Damm , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Cc: Manikanta Maddireddy , Koichiro Den , Damien Le Moal , Niklas Cassel , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue drivers Date: Tue, 17 Feb 2026 22:27:11 +0100 Message-ID: <20260217212707.2450423-16-cassel@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260217212707.2450423-11-cassel@kernel.org> References: <20260217212707.2450423-11-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4691; i=cassel@kernel.org; h=from:subject; bh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGDKn3NX7eofZL7l0boT87F2/nh3pD4+584evSZ7tm97N1 4Zrf7O+6ChlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBE5G8w/M/7lBqTn/vUik+u 87b5OW2efJFlp5dvk2nZ7cF6INMw/g4jww6Xu419J9mSrokUP75pFvxIVW2FfN0hF9Xnxzk55qV VMgAA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA Content-Transfer-Encoding: 8bit Most DWC based EPC glue drivers that have BARs marked as BAR_RESERVED in epc_features also call dw_pcie_ep_reset_bar() for these reserved BARs in ep->ops->init(). An EPF driver will be able to get/enable BARs that have been disabled/reset unless they are marked as BAR_RESERVED (see pci_epc_get_next_free_bar()). Thus all EPC drivers that have a BAR marked as BAR_RESERVED in epc_features AND call dw_pcie_ep_reset_bar() should really be marked as BAR_DISABLED. BARs that are marked as BAR_RESERVED in epc_features but for which dw_pcie_ep_reset_bar() is not called in ep->ops->init() are still kept as BAR_RESERVED. No EPC drivers outside drivers/pci/controllers/dwc mark their BARs as BAR_RESERVED, so there is nothing to do in non-DWC based EPC drivers. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++------ drivers/pci/controller/dwc/pcie-rcar-gen4.c | 6 +++--- drivers/pci/controller/dwc/pcie-tegra194.c | 8 ++++---- drivers/pci/controller/dwc/pcie-uniphier-ep.c | 4 ++-- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index a5b8d0b71677..ec1e3557ca53 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1433,19 +1433,19 @@ static int imx_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, static const struct pci_epc_features imx8m_pcie_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, - .bar[BAR_1] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, + .bar[BAR_1] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_64K, }; static const struct pci_epc_features imx8q_pcie_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, - .bar[BAR_1] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_1] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_64K, }; diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c index a6912e85e4dd..9dd05bac22b9 100644 --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c @@ -422,10 +422,10 @@ static int rcar_gen4_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, static const struct pci_epc_features rcar_gen4_pcie_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, - .bar[BAR_1] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, + .bar[BAR_1] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256 }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_1M, }; diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 31aa9a494dbc..9f9453e8cd23 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1994,10 +1994,10 @@ static const struct pci_epc_features tegra_pcie_epc_features = { .bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M, .only_64bit = true, }, .bar[BAR_1] = { .type = BAR_64BIT_UPPER, }, - .bar[BAR_2] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, - .bar[BAR_4] = { .type = BAR_RESERVED, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_2] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, + .bar[BAR_4] = { .type = BAR_DISABLED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_64K, }; diff --git a/drivers/pci/controller/dwc/pcie-uniphier-ep.c b/drivers/pci/controller/dwc/pcie-uniphier-ep.c index f873a1659592..5bde3ee682b5 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier-ep.c +++ b/drivers/pci/controller/dwc/pcie-uniphier-ep.c @@ -429,8 +429,8 @@ static const struct uniphier_pcie_ep_soc_data uniphier_pro5_data = { .bar[BAR_1] = { .type = BAR_64BIT_UPPER, }, .bar[BAR_2] = { .only_64bit = true, }, .bar[BAR_3] = { .type = BAR_64BIT_UPPER, }, - .bar[BAR_4] = { .type = BAR_RESERVED, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_4] = { .type = BAR_DISABLED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, }, }; -- 2.53.0