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From: Thierry Reding <thierry.reding@kernel.org>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thierry Reding <thierry.reding@kernel.org>
Cc: Jon Hunter <jonathanh@nvidia.com>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH 04/10] dt-bindings: interrupt-controller: tegra: Fix reg entries
Date: Mon, 23 Feb 2026 15:32:59 +0100	[thread overview]
Message-ID: <20260223143305.3771383-5-thierry.reding@kernel.org> (raw)
In-Reply-To: <20260223143305.3771383-1-thierry.reding@kernel.org>

From: Thierry Reding <treding@nvidia.com>

Tegra210 takes exactly 6 "reg" property entries, as opposed to Tegra30
which supports only 5 entries.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../nvidia,tegra20-ictlr.yaml                 | 23 +++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml
index 074a873880e5..d0c039d14ad2 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml
@@ -35,11 +35,12 @@ properties:
       - enum:
           - nvidia,tegra20-ictlr
           - nvidia,tegra30-ictlr
+          - nvidia,tegra210-ictlr
 
   reg:
     description: Each entry is a block of 32 interrupts
     minItems: 4
-    maxItems: 5
+    maxItems: 6
 
   interrupt-controller: true
 
@@ -64,10 +65,28 @@ allOf:
       properties:
         reg:
           maxItems: 4
-    else:
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nvidia,tegra30-ictlr
+    then:
       properties:
         reg:
           minItems: 5
+          maxItems: 5
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nvidia,tegra210-ictlr
+    then:
+      properties:
+        reg:
+          minItems: 6
+          maxItems: 6
 
 examples:
   - |
-- 
2.52.0


  parent reply	other threads:[~2026-02-23 14:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-23 14:32 [PATCH 00/10] dt-bindings: Various cleanups for Tegra-related bindings Thierry Reding
2026-02-23 14:32 ` [PATCH v2 01/10] dt-bindings: phy: tegra-xusb: Document Type C support Thierry Reding
2026-03-06  0:02   ` Rob Herring (Arm)
2026-02-23 14:32 ` [PATCH 02/10] dt-bindings: pci: tegra: Convert to json-schema Thierry Reding
2026-03-06  0:19   ` Rob Herring
2026-02-23 14:32 ` [PATCH v3 03/10] dt-bindings: clock: tegra124-dfll: " Thierry Reding
2026-03-06  0:22   ` Rob Herring (Arm)
2026-02-23 14:32 ` Thierry Reding [this message]
2026-03-06  0:23   ` [PATCH 04/10] dt-bindings: interrupt-controller: tegra: Fix reg entries Rob Herring (Arm)
2026-02-23 14:33 ` [PATCH v2 05/10] dt-bindings: arm: tegra: Add missing compatible strings Thierry Reding
2026-02-23 14:33 ` [PATCH 06/10] dt-bindings: phy: tegra: Document Tegra210 USB PHY Thierry Reding
2026-03-06  0:23   ` Rob Herring (Arm)
2026-02-23 14:33 ` [PATCH v2 07/10] dt-bindings: memory: Add Tegra210 memory controller bindings Thierry Reding
2026-03-06  0:25   ` Rob Herring
2026-02-23 14:33 ` [PATCH 08/10] dt-bindings: memory: tegra210: Mark EMC as cooling device Thierry Reding
2026-02-23 14:33 ` [PATCH 09/10] arm64: tegra: Fix snps,blen properties Thierry Reding
2026-02-23 14:33 ` [PATCH 10/10] arm64: tegra: Drop redundant clock and reset names for TSEC Thierry Reding
2026-02-23 17:11 ` [PATCH 00/10] dt-bindings: Various cleanups for Tegra-related bindings Rob Herring
2026-02-27 12:03   ` Thierry Reding

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