From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: <bhelgaas@google.com>, <lpieralisi@kernel.org>,
<kwilczynski@kernel.org>, <mani@kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<kishon@kernel.org>, <arnd@arndb.de>,
<gregkh@linuxfoundation.org>, <Frank.Li@nxp.com>,
<den@valinux.co.jp>, <hongxing.zhu@nxp.com>,
<jingoohan1@gmail.com>, <vidyas@nvidia.com>, <cassel@kernel.org>,
<18255117159@163.com>
Cc: <linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Manikanta Maddireddy <mmaddireddy@nvidia.com>
Subject: [PATCH v7 11/13] PCI: tegra194: Use HW version number
Date: Tue, 3 Mar 2026 12:24:46 +0530 [thread overview]
Message-ID: <20260303065448.2361488-12-mmaddireddy@nvidia.com> (raw)
In-Reply-To: <20260303065448.2361488-1-mmaddireddy@nvidia.com>
Tegra194 PCIe driver uses custom version number to detect Tegra194 and
Tegra234 IPs. With version detect logic added, version check results
in mismatch warnings.
Use HW version numbers in Tegra194 driver to avoid this kernel warnings.
Fixed version check to enable ecrc for Tegra194.
Existing 490A check is left intact in case any HW relying on existing check.
Fixes: a54e19073718 ("PCI: tegra194: Add Tegra234 PCIe support")
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
Changes V1 -> V7: None
drivers/pci/controller/dwc/pcie-designware.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.h | 2 ++
drivers/pci/controller/dwc/pcie-tegra194.c | 4 ++--
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 345365ea97c7..0dac5d2f5a83 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -559,7 +559,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
if (upper_32_bits(limit_addr) > upper_32_bits(parent_bus_addr) &&
dw_pcie_ver_is_ge(pci, 460A))
val |= PCIE_ATU_INCREASE_REGION_SIZE;
- if (dw_pcie_ver_is(pci, 490A))
+ if (dw_pcie_ver_is(pci, 490A) || dw_pcie_ver_is(pci, 500A))
val = dw_pcie_enable_ecrc(val);
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val);
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index f4cf1602cc99..5bceadbd2c9f 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -34,8 +34,10 @@
#define DW_PCIE_VER_470A 0x3437302a
#define DW_PCIE_VER_480A 0x3438302a
#define DW_PCIE_VER_490A 0x3439302a
+#define DW_PCIE_VER_500A 0x3530302a
#define DW_PCIE_VER_520A 0x3532302a
#define DW_PCIE_VER_540A 0x3534302a
+#define DW_PCIE_VER_562A 0x3536322a
#define __dw_pcie_ver_cmp(_pci, _ver, _op) \
((_pci)->version _op DW_PCIE_VER_ ## _ver)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 1963165967b9..1c6543341fb9 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -35,8 +35,8 @@
#include <soc/tegra/bpmp-abi.h>
#include "../../pci.h"
-#define TEGRA194_DWC_IP_VER 0x490A
-#define TEGRA234_DWC_IP_VER 0x562A
+#define TEGRA194_DWC_IP_VER DW_PCIE_VER_500A
+#define TEGRA234_DWC_IP_VER DW_PCIE_VER_562A
#define APPL_PINMUX 0x0
#define APPL_PINMUX_PEX_RST BIT(0)
--
2.34.1
next prev parent reply other threads:[~2026-03-03 6:56 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-03 6:54 [PATCH v7 00/13] Fixes to pcie-tegra194 driver Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 01/13] PCI: tegra194: Fix polling delay for L2 state Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 02/13] PCI: tegra194: Refactor LTSSM state polling on surprise down Manikanta Maddireddy
2026-03-05 9:31 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 03/13] PCI: tegra194: Don't force the device into the D0 state before L2 Manikanta Maddireddy
2026-03-05 9:40 ` Manivannan Sadhasivam
2026-03-15 13:21 ` Manikanta Maddireddy
2026-03-16 1:25 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 04/13] PCI: tegra194: Disable PERST IRQ only in Endpoint mode Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 05/13] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 06/13] PCI: tegra194: Disable direct speed change for EP Manikanta Maddireddy
2026-03-05 9:43 ` Manivannan Sadhasivam
2026-03-15 13:44 ` Manikanta Maddireddy
2026-03-16 1:27 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 07/13] PCI: tegra194: Set LTR message request before PCIe link up Manikanta Maddireddy
2026-03-05 10:18 ` Manivannan Sadhasivam
2026-03-15 13:49 ` Manikanta Maddireddy
2026-03-16 1:28 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 08/13] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP Manikanta Maddireddy
2026-03-05 10:19 ` Manivannan Sadhasivam
2026-03-15 13:54 ` Manikanta Maddireddy
2026-03-16 1:31 ` Manivannan Sadhasivam
2026-03-16 3:41 ` Manikanta Maddireddy
2026-03-16 4:26 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 09/13] PCI: tegra194: Allow system suspend when the Endpoint link is not up Manikanta Maddireddy
2026-03-05 10:29 ` Manivannan Sadhasivam
2026-03-15 14:10 ` Manikanta Maddireddy
2026-03-16 1:34 ` Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 10/13] PCI: tegra194: Free up EP resources during remove() Manikanta Maddireddy
2026-03-03 6:54 ` Manikanta Maddireddy [this message]
2026-03-05 10:34 ` [PATCH v7 11/13] PCI: tegra194: Use HW version number Manivannan Sadhasivam
2026-03-03 6:54 ` [PATCH v7 12/13] PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on Manikanta Maddireddy
2026-03-03 6:54 ` [PATCH v7 13/13] PCI: tegra194: Free resources during controller deinitialization Manikanta Maddireddy
2026-03-05 10:43 ` Manivannan Sadhasivam
2026-03-15 14:16 ` Manikanta Maddireddy
2026-03-16 1:35 ` Manivannan Sadhasivam
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