From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: <bhelgaas@google.com>, <lpieralisi@kernel.org>,
<kwilczynski@kernel.org>, <mani@kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<kishon@kernel.org>, <arnd@arndb.de>,
<gregkh@linuxfoundation.org>, <Frank.Li@nxp.com>,
<den@valinux.co.jp>, <hongxing.zhu@nxp.com>,
<jingoohan1@gmail.com>, <vidyas@nvidia.com>, <cassel@kernel.org>,
<18255117159@163.com>
Cc: <linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Manikanta Maddireddy <mmaddireddy@nvidia.com>
Subject: [PATCH v8 5/9] PCI: tegra194: Enable hardware hot reset mode in Endpoint
Date: Wed, 25 Mar 2026 00:39:56 +0530 [thread overview]
Message-ID: <20260324191000.1095768-6-mmaddireddy@nvidia.com> (raw)
In-Reply-To: <20260324191000.1095768-1-mmaddireddy@nvidia.com>
From: Vidya Sagar <vidyas@nvidia.com>
When PCIe link goes down, hardware can retrain the link and try to link up.
To enable this feature, program the APPL_CTRL register with hardware hot
reset with immediate LTSSM enable mode.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
Changes V1 -> V8: None
drivers/pci/controller/dwc/pcie-tegra194.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index b312d02f8dab..4527d4759e42 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1791,6 +1791,8 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
val = appl_readl(pcie, APPL_CTRL);
val |= APPL_CTRL_SYS_PRE_DET_STATE;
val |= APPL_CTRL_HW_HOT_RST_EN;
+ val &= ~(APPL_CTRL_HW_HOT_RST_MODE_MASK << APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
+ val |= (APPL_CTRL_HW_HOT_RST_MODE_IMDT_RST_LTSSM_EN << APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
appl_writel(pcie, val, APPL_CTRL);
val = appl_readl(pcie, APPL_CFG_MISC);
--
2.34.1
next prev parent reply other threads:[~2026-03-24 19:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 19:09 [PATCH v8 0/9] Enhancements to pcie-tegra194 driver Manikanta Maddireddy
2026-03-24 19:09 ` [PATCH v8 1/9] PCI: tegra194: Drive CLKREQ# signal low explicitly Manikanta Maddireddy
2026-03-24 19:09 ` [PATCH v8 2/9] PCI: tegra194: Calibrate pipe to UPHY for Endpoint mode Manikanta Maddireddy
2026-03-24 19:09 ` [PATCH v8 3/9] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration Manikanta Maddireddy
2026-03-24 19:09 ` [PATCH v8 4/9] PCI: tegra194: Enable DMA interrupt Manikanta Maddireddy
2026-03-24 19:09 ` Manikanta Maddireddy [this message]
2026-03-24 19:09 ` [PATCH v8 6/9] dt-bindings: PCI: tegra194: Add monitor clock support Manikanta Maddireddy
2026-03-24 19:09 ` [PATCH v8 7/9] PCI: tegra194: Add core " Manikanta Maddireddy
2026-03-24 19:09 ` [PATCH v8 8/9] arm64: tegra: Add aspm-l1-entry-delay-ns to PCIe nodes Manikanta Maddireddy
2026-03-24 19:10 ` [PATCH v8 9/9] PCI: tegra194: Use aspm-l1-entry-delay-ns DT property for L1 entrance latency Manikanta Maddireddy
2026-04-08 22:30 ` Bjorn Helgaas
2026-04-09 5:56 ` Manikanta Maddireddy
2026-04-09 18:40 ` Bjorn Helgaas
2026-04-10 7:38 ` Manikanta Maddireddy
2026-04-09 18:36 ` Bjorn Helgaas
2026-04-04 15:28 ` (subset) [PATCH v8 0/9] Enhancements to pcie-tegra194 driver Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260324191000.1095768-6-mmaddireddy@nvidia.com \
--to=mmaddireddy@nvidia.com \
--cc=18255117159@163.com \
--cc=Frank.Li@nxp.com \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=cassel@kernel.org \
--cc=conor+dt@kernel.org \
--cc=den@valinux.co.jp \
--cc=gregkh@linuxfoundation.org \
--cc=hongxing.zhu@nxp.com \
--cc=jingoohan1@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=kishon@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox