From: Srirangan Madhavan <smadhavan@nvidia.com>
To: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: vsethi@nvidia.com, alwilliamson@nvidia.com,
Dan Williams <danwilliams@nvidia.com>,
Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
Vishal Aslot <vaslot@nvidia.com>,
Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
Richard Cheng <icheng@nvidia.com>,
linux-tegra@vger.kernel.org,
Srirangan Madhavan <smadhavan@nvidia.com>
Subject: [PATCH v6 9/9] Documentation/ABI: Document CXL memdev cxl_reset
Date: Thu, 28 May 2026 08:31:54 +0000 [thread overview]
Message-ID: <20260528083154.137979-10-smadhavan@nvidia.com> (raw)
In-Reply-To: <20260528083154.137979-1-smadhavan@nvidia.com>
Document the write-only cxl_reset attribute under CXL memdev devices.
The attribute is visible only when the memdev's PCI parent advertises
CXL Reset capability, and writing a true boolean value requests the CXL
reset flow.
Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
---
Documentation/ABI/testing/sysfs-bus-cxl | 28 +++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl
index 16a9b3d2e2c0..d5d055e7a756 100644
--- a/Documentation/ABI/testing/sysfs-bus-cxl
+++ b/Documentation/ABI/testing/sysfs-bus-cxl
@@ -110,6 +110,34 @@ Description:
affinity for this device.
+What: /sys/bus/cxl/devices/memX/cxl_reset
+Date: May, 2026
+KernelVersion: v7.1
+Contact: linux-cxl@vger.kernel.org
+Description:
+ (WO) Write a boolean true value, for example "1" or "true", to
+ request CXL Reset for this memory device. The driver performs
+ CXL-specific reset coordination for the target memdev before
+ issuing reset, including any required preparation for affected
+ CXL memory regions and related CXL memory devices.
+
+ CXL Reset control is Function 0 scoped. A write to this
+ attribute resets the CXL.cache and CXL.mem state for all
+ CXL.cache or CXL.mem functions in the same CXL device reset
+ scope, not only the memX device associated with this file.
+
+ The optional CXL Reset Memory Clear operation is not exposed by
+ this attribute.
+
+ A reset fails with -EBUSY if any affected CXL region is
+ online as System RAM or has an active region driver bound.
+ Userspace must first quiesce and release affected CXL memory
+ mappings.
+
+ If this file is not present, then CXL Reset is not supported
+ for the device.
+
+
What: /sys/bus/cxl/devices/memX/security/state
Date: June, 2023
KernelVersion: v6.5
--
2.43.0
prev parent reply other threads:[~2026-05-28 8:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-28 8:31 [PATCH v6 0/9] cxl: Add cxl_reset sysfs attribute for memdevs Srirangan Madhavan
2026-05-28 8:31 ` [PATCH v6 1/9] cxl/hdm: Add helpers to restore and commit memdev decoders Srirangan Madhavan
2026-05-28 11:06 ` Richard Cheng
2026-05-28 8:31 ` [PATCH v6 2/9] PCI: Export pci_dev_save_and_disable() and pci_dev_restore() Srirangan Madhavan
2026-05-28 8:31 ` [PATCH v6 3/9] cxl: Add reset-idle and cache flush helpers Srirangan Madhavan
2026-05-28 8:31 ` [PATCH v6 4/9] PCI/CXL: Add sibling function coordination for reset Srirangan Madhavan
2026-05-28 11:15 ` Richard Cheng
2026-05-28 8:31 ` [PATCH v6 5/9] cxl/pci: Add CXL DVSEC reset helper Srirangan Madhavan
2026-05-28 8:31 ` [PATCH v6 6/9] cxl/pci: Track memdevs affected by CXL reset Srirangan Madhavan
2026-05-28 8:31 ` [PATCH v6 7/9] cxl/pci: Orchestrate CXL reset for affected memdevs Srirangan Madhavan
2026-05-28 8:31 ` [PATCH v6 8/9] cxl/memdev: Add cxl_reset sysfs attribute Srirangan Madhavan
2026-05-28 8:31 ` Srirangan Madhavan [this message]
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