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Fri, 24 Jul 2026 15:00:17 -0700 From: Sumit Gupta To: , , , , , , , , , , , , , , , , , CC: , , , , , , , Subject: [PATCH v3 3/4] cpufreq: CPPC: Preserve OSPM-set registers across hotplug and unload Date: Sat, 25 Jul 2026 03:29:36 +0530 Message-ID: <20260724215937.3368276-4-sumitg@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260724215937.3368276-1-sumitg@nvidia.com> References: <20260724215937.3368276-1-sumitg@nvidia.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017093:EE_|PH7PR12MB8780:EE_ X-MS-Office365-Filtering-Correlation-Id: cdf87264-dc5d-45d7-67a4-08dee9cf0069 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|7416014|36860700016|23010399003|1800799024|921020|6133799003|18002099003|22082099003|56012099006|11063799006|10067099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NFfSdNZQbjm1KdeA15pxzR8tf4sBYDfYiqHv6nTwwoXvTx6OzTab5kkBXIxTAnr+FGHJUBb8pA3dpuiEPo8wKermc3qje7NMuZSF9Umz6Y4ZN4gqfrv2cKwN23YfjrVjBEMqJ8nHzeLzNWkvuYPWZnwCb8SPSM6ez/r67tRovUymHb+0jeTksZU1S+fFsVoXHq1c2bI3vPdLRwCpLlv9IOK2HMrGFAuUNIXWGEvWxAG1mECPDoXTqOxDVEeowwjorZzuN+UkLbE7kFibNiJyNVWVOM50sP4DVO/5HDKhenUyqiCZ2PwB8lh1BccWRBWKLLWBDdXGCbxAkOk174WVt//kzx15IvfMoRzC/KJ5+2TSfYdtkGhXu9tfw3S1qXnfNqawLxw+z0ZcU2iglWFAk0qp4R63sznFwmP7zmvzG5S2xtCJpN8iBTBBwHr/4JqC X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jul 2026 22:00:40.5803 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cdf87264-dc5d-45d7-67a4-08dee9cf0069 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017093.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8780 Values written to OSPM-set CPPC registers (via sysfs or the autonomous boot parameter) can be lost in two ways: - Across CPU hotplug: the platform may reset a CPU's registers while it is offline. - On driver unload: the value the driver wrote is left in the register instead of returning to its pre-driver state. Add a small table-driven mechanism that handles both: - On init(), capture each register's firmware value before the driver programs anything. - On offline(), read back each register's current value (whatever was last set via sysfs or the boot parameter) so it can be reapplied, then restore the firmware value. - On online(), reapply the value captured at offline() after the performance request is re-established. Keep Autonomous Selection (auto_sel) last in the table so that, on online(), its saved value is reapplied after the other registers that shape its behaviour. Cover the Autonomous Selection (auto_sel), Energy Performance Preference (EPP) and Autonomous Activity Window (auto_act_window) registers. Suggested-by: Pierre Gondois Link: https://lore.kernel.org/all/86780f97-29ee-4a72-b311-38c89434b707@arm.com/ Signed-off-by: Sumit Gupta --- drivers/cpufreq/cppc_cpufreq.c | 157 +++++++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c index 34cdba00e61a..8a13ec49eb9d 100644 --- a/drivers/cpufreq/cppc_cpufreq.c +++ b/drivers/cpufreq/cppc_cpufreq.c @@ -28,6 +28,150 @@ static struct cpufreq_driver cppc_cpufreq_driver; +/* + * OSPM-set CPPC registers tracked for save/restore. A value set via sysfs or + * the autonomous boot parameter is reapplied from online() across CPU + * hotplug, and the firmware value is restored from offline(). + * + * Autonomous Selection (auto_sel) is kept last so its saved value is + * reapplied after the other registers that shape its behaviour. + */ +enum cppc_saved_reg_id { + CPPC_SAVED_EPP, + CPPC_SAVED_AUTO_ACT_WINDOW, + CPPC_SAVED_AUTO_SEL, + CPPC_NR_SAVED_REGS, +}; + +struct cppc_saved_reg { + int (*get)(int cpu, u64 *val); + int (*set)(int cpu, u64 val); +}; + +static const struct cppc_saved_reg cppc_saved_regs[CPPC_NR_SAVED_REGS] = { + [CPPC_SAVED_EPP] = { + cppc_get_epp_perf, cppc_set_epp, + }, + [CPPC_SAVED_AUTO_ACT_WINDOW] = { + cppc_get_auto_act_window, cppc_set_auto_act_window, + }, + [CPPC_SAVED_AUTO_SEL] = { + cppc_get_auto_sel, cppc_set_auto_sel, + }, +}; + +/* + * Per-policy saved state for each register in cppc_saved_regs[]: + * firmware_val - value before the driver touched it, captured at init() + * and restored while the policy is offline. U64_MAX if it + * could not be read + * requested_val - value in effect when the policy last went offline, + * reapplied at online(). U64_MAX if none + */ +struct cppc_saved_state { + u64 firmware_val; + u64 requested_val; +}; + +static DEFINE_PER_CPU(struct cppc_saved_state[CPPC_NR_SAVED_REGS], cppc_saved_state); + +/* + * Return this policy's saved state. Each policy keeps a single copy, stored in + * the per-CPU variable of the first CPU it manages. related_cpus (the policy's + * full set of CPUs) never changes while it exists, so this CPU (unlike + * policy->cpu) stays the same across CPU hotplug, and every callback reaches + * the same copy. + */ +static struct cppc_saved_state *cppc_cpufreq_policy_saved_state(struct cpufreq_policy *policy) +{ + const struct cpumask *policy_cpus = policy->related_cpus; + + /* + * related_cpus is empty until the core fills it in after init(). Until + * then, fall back to policy->cpus, which has the same first CPU. + */ + if (cpumask_empty(policy_cpus)) + policy_cpus = policy->cpus; + + return per_cpu(cppc_saved_state, cpumask_first(policy_cpus)); +} + +/* + * Capture each register's firmware value before the driver programs anything. + */ +static void cppc_cpufreq_save_firmware_regs(struct cpufreq_policy *policy) +{ + struct cppc_saved_state *st = cppc_cpufreq_policy_saved_state(policy); + unsigned int cpu = policy->cpu; + u64 val; + int i; + + for (i = 0; i < CPPC_NR_SAVED_REGS; i++) { + if (cppc_saved_regs[i].get(cpu, &val)) + val = U64_MAX; + st[i].firmware_val = val; + st[i].requested_val = U64_MAX; + } +} + +/* + * Save each register's current value so it can later be reapplied. + */ +static void cppc_cpufreq_save_requested_regs(struct cpufreq_policy *policy) +{ + struct cppc_saved_state *st = cppc_cpufreq_policy_saved_state(policy); + unsigned int cpu = policy->cpu; + u64 val; + int i; + + for (i = 0; i < CPPC_NR_SAVED_REGS; i++) { + if (cppc_saved_regs[i].get(cpu, &val)) + val = U64_MAX; + st[i].requested_val = val; + } +} + +/* + * Restore each register's firmware value, leaving the platform in its + * pre-driver state. + */ +static void cppc_cpufreq_restore_firmware_regs(struct cpufreq_policy *policy) +{ + struct cppc_saved_state *st = cppc_cpufreq_policy_saved_state(policy); + unsigned int cpu = policy->cpu; + int i, ret; + + for (i = 0; i < CPPC_NR_SAVED_REGS; i++) { + if (st[i].firmware_val == U64_MAX) + continue; + + ret = cppc_saved_regs[i].set(cpu, st[i].firmware_val); + if (ret && ret != -EOPNOTSUPP) + pr_debug("Failed to restore firmware reg %d on CPU%u (%d)\n", + i, cpu, ret); + } +} + +/* + * Reapply each register's requested value that offline() saved. + */ +static void cppc_cpufreq_reapply_requested_regs(struct cpufreq_policy *policy) +{ + struct cppc_saved_state *st = cppc_cpufreq_policy_saved_state(policy); + unsigned int cpu = policy->cpu; + int i, ret; + + for (i = 0; i < CPPC_NR_SAVED_REGS; i++) { + if (st[i].requested_val == U64_MAX) + continue; + + ret = cppc_saved_regs[i].set(cpu, st[i].requested_val); + if (ret && ret != -EOPNOTSUPP) + pr_debug("Failed to reapply saved reg %d on CPU%u (%d)\n", + i, cpu, ret); + } +} + #ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE static enum { FIE_UNSET = -1, @@ -707,6 +851,8 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) policy->cur = cppc_perf_to_khz(caps, caps->highest_perf); cpu_data->perf_ctrls.desired_perf = caps->highest_perf; + cppc_cpufreq_save_firmware_regs(policy); + ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls); if (ret) { pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n", @@ -725,15 +871,24 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) /* * With offline() defined, the cpufreq core keeps the policy alive when * a CPU is hotplugged out. + * + * Save each register's current value so online() can reapply it, then + * restore the firmware value, leaving the platform in its pre-driver state. */ static int cppc_cpufreq_cpu_offline(struct cpufreq_policy *policy) { + cppc_cpufreq_save_requested_regs(policy); + cppc_cpufreq_restore_firmware_regs(policy); + return 0; } /* * Re-enable CPPC when the policy's CPU comes back online, since the platform * may have disabled it while the CPU was offline. + * + * offline() reset the registers to their firmware values, so reapply the + * OSPM-set values it saved. */ static int cppc_cpufreq_cpu_online(struct cpufreq_policy *policy) { @@ -761,6 +916,8 @@ static int cppc_cpufreq_cpu_online(struct cpufreq_policy *policy) pr_debug("Failed to reapply perf request on CPU%d (%d)\n", cpu, ret); + cppc_cpufreq_reapply_requested_regs(policy); + return 0; } -- 2.34.1