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This keeps validation of base, range overflow, interleave, target type, and enable state in one place before adding another HDM parser. Keep caller-owned policy out of the decode helper. A committed zero-size decoder now decodes successfully, while init_hdm_decoder() retains its existing zero-size rejection. Preserve endpoint DPA state ownership by using the decoded skip value as a local input to devm_cxl_dpa_reserve(). The reservation helper updates cxled->skip under cxl_rwsem.dpa. Reported-by: Fenghua Yu Signed-off-by: Srirangan Madhavan --- drivers/cxl/core/core.h | 4 ++ drivers/cxl/core/hdm.c | 75 +++++++++++++------------------------ drivers/cxl/core/port.c | 19 ++++++++++ drivers/cxl/core/resource.c | 43 +++++++++++++++++++++ 4 files changed, 91 insertions(+), 50 deletions(-) diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 48fbc635975a..5350c154d88e 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -157,6 +157,7 @@ long cxl_pci_get_latency(struct pci_dev *pdev); int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c); int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port, struct access_coordinate *c); +struct pci_dev *cxl_port_get_uport_pci_dev(struct cxl_port *port); static inline struct device *port_to_host(struct cxl_port *port) { @@ -215,6 +216,9 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, struct cxl_endpoint_dvsec_info *info); int cxl_commit_start(void __iomem *hdm, struct cxl_decoder_settings *settings); int cxl_commit_wait(void __iomem *hdm, struct cxl_decoder_settings *settings); +int cxl_hdm_decode_decoder(struct cxl_decoder_settings *settings, int id, + u32 ctrl, u64 base, u64 size, u64 target_or_skip, + bool *committed); int cxl_port_get_possible_dports(struct cxl_port *port); #ifdef CONFIG_CXL_FEATURES diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 70ffebd3e213..d621d827f59f 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -907,14 +907,11 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld, { struct cxl_endpoint_decoder *cxled = NULL; u64 size, base, skip, dpa_size, lo, hi; + struct cxl_decoder_settings settings; bool committed; u32 remainder; int i, rc; - u32 ctrl; - union { - u64 value; - unsigned char target_id[8]; - } target_list; + u32 ctrl, tl_low, tl_high; if (should_emulate_decoders(info)) return cxl_setup_hdm_decoder_from_dvsec(port, cxld, dpa_base, @@ -927,35 +924,33 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld, lo = readl(hdm + CXL_HDM_DECODER0_SIZE_LOW_OFFSET(which)); hi = readl(hdm + CXL_HDM_DECODER0_SIZE_HIGH_OFFSET(which)); size = (hi << 32) + lo; - committed = !!(ctrl & CXL_HDM_DECODER0_CTRL_COMMITTED); + tl_low = readl(hdm + CXL_HDM_DECODER0_TL_LOW(which)); + tl_high = readl(hdm + CXL_HDM_DECODER0_TL_HIGH(which)); + rc = cxl_hdm_decode_decoder(&settings, which, ctrl, base, size, + ((u64)tl_high << 32) | tl_low, &committed); + if (rc) { + dev_warn(&port->dev, + "decoder%d.%d: Invalid decoder configuration (ctrl: %#x): %d\n", + port->id, cxld->id, ctrl, rc); + return rc; + } + cxld->commit = cxl_decoder_commit; cxld->reset = cxl_decoder_reset; - - if (!committed) - size = 0; - if (base == U64_MAX || size == U64_MAX) { - dev_warn(&port->dev, "decoder%d.%d: Invalid resource range\n", - port->id, cxld->id); - return -ENXIO; - } + cxld->hpa_range = settings.hpa_range; + cxld->interleave_ways = settings.interleave_ways; + cxld->interleave_granularity = settings.interleave_granularity; + cxld->target_type = settings.target_type; + cxld->flags = settings.flags; + size = range_len(&cxld->hpa_range); if (info) cxled = to_cxl_endpoint_decoder(&cxld->dev); - cxld->hpa_range = (struct range) { - .start = base, - .end = base + size - 1, - }; + if (!cxled && cxld->interleave_ways > 8) + return -ENXIO; /* decoders are enabled if committed */ if (committed) { - cxld->flags |= CXL_DECODER_F_ENABLE; - if (ctrl & CXL_HDM_DECODER0_CTRL_LOCK) - cxld->flags |= CXL_DECODER_F_LOCK; - if (FIELD_GET(CXL_HDM_DECODER0_CTRL_HOSTONLY, ctrl)) - cxld->target_type = CXL_DECODER_HOSTONLYMEM; - else - cxld->target_type = CXL_DECODER_DEVMEM; - guard(rwsem_write)(&cxl_rwsem.region); if (cxld->id != cxl_num_decoders_committed(port)) { dev_warn(&port->dev, @@ -995,33 +990,15 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld, writel(ctrl, hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which)); } } - rc = eiw_to_ways(FIELD_GET(CXL_HDM_DECODER0_CTRL_IW_MASK, ctrl), - &cxld->interleave_ways); - if (rc) { - dev_warn(&port->dev, - "decoder%d.%d: Invalid interleave ways (ctrl: %#x)\n", - port->id, cxld->id, ctrl); - return rc; - } - rc = eig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl), - &cxld->interleave_granularity); - if (rc) { - dev_warn(&port->dev, - "decoder%d.%d: Invalid interleave granularity (ctrl: %#x)\n", - port->id, cxld->id, ctrl); - return rc; - } - dev_dbg(&port->dev, "decoder%d.%d: range: %#llx-%#llx iw: %d ig: %d\n", port->id, cxld->id, cxld->hpa_range.start, cxld->hpa_range.end, cxld->interleave_ways, cxld->interleave_granularity); if (!cxled) { - lo = readl(hdm + CXL_HDM_DECODER0_TL_LOW(which)); - hi = readl(hdm + CXL_HDM_DECODER0_TL_HIGH(which)); - target_list.value = (hi << 32) + lo; for (i = 0; i < cxld->interleave_ways; i++) - cxld->target_map[i] = target_list.target_id[i]; + cxld->target_map[i] = i < 4 ? + (tl_low >> (i * 8)) & 0xff : + (tl_high >> ((i - 4) * 8)) & 0xff; return 0; } @@ -1036,9 +1013,7 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld, port->id, cxld->id, size, cxld->interleave_ways); return -ENXIO; } - lo = readl(hdm + CXL_HDM_DECODER0_SKIP_LOW(which)); - hi = readl(hdm + CXL_HDM_DECODER0_SKIP_HIGH(which)); - skip = (hi << 32) + lo; + skip = settings.target_or_skip; rc = devm_cxl_dpa_reserve(cxled, *dpa_base + skip, dpa_size, skip); if (rc) { dev_err(&port->dev, diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 625e4aa427db..5085574521c6 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -34,6 +34,25 @@ static DEFINE_IDA(cxl_port_ida); static DEFINE_XARRAY(cxl_root_buses); +struct pci_dev *cxl_port_get_uport_pci_dev(struct cxl_port *port) +{ + struct device *uport = port->uport_dev; + struct device *host; + + if (is_cxl_memdev(uport)) { + struct cxl_memdev *cxlmd = to_cxl_memdev(uport); + + host = cxlmd->dev.parent; + } else { + host = uport; + } + + if (!host || !dev_is_pci(host)) + return NULL; + + return pci_dev_get(to_pci_dev(host)); +} + /* * The terminal device in PCI is NULL and @platform_bus * for platform devices (for cxl_test) diff --git a/drivers/cxl/core/resource.c b/drivers/cxl/core/resource.c index 8d3f43640199..e6aa55079c76 100644 --- a/drivers/cxl/core/resource.c +++ b/drivers/cxl/core/resource.c @@ -113,3 +113,46 @@ int cxl_commit_wait(void __iomem *hdm, struct cxl_decoder_settings *settings) return cxld_await_commit(hdm, settings->id); } EXPORT_SYMBOL_FOR_MODULES(cxl_commit_wait, "cxl_core"); + +int cxl_hdm_decode_decoder(struct cxl_decoder_settings *settings, int id, + u32 ctrl, u64 base, u64 size, u64 target_or_skip, + bool *committed) +{ + bool enabled = FIELD_GET(CXL_HDM_DECODER0_CTRL_COMMITTED, ctrl); + int rc; + + *settings = (struct cxl_decoder_settings) { + .id = id, + .target_or_skip = target_or_skip, + .target_type = FIELD_GET(CXL_HDM_DECODER0_CTRL_HOSTONLY, ctrl) ? + CXL_DECODER_HOSTONLYMEM : CXL_DECODER_DEVMEM, + }; + + if (committed) + *committed = enabled; + if (!enabled) + size = 0; + if (base == U64_MAX || size == U64_MAX || + (size && base > U64_MAX - (size - 1))) + return -ENXIO; + + settings->hpa_range = (struct range) { + .start = base, + .end = base + size - 1, + }; + if (enabled) { + settings->flags = CXL_DECODER_F_ENABLE; + if (ctrl & CXL_HDM_DECODER0_CTRL_LOCK) + settings->flags |= CXL_DECODER_F_LOCK; + } + + rc = eiw_to_ways(FIELD_GET(CXL_HDM_DECODER0_CTRL_IW_MASK, ctrl), + &settings->interleave_ways); + if (rc) + return rc; + + return eig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, + ctrl), + &settings->interleave_granularity); +} +EXPORT_SYMBOL_FOR_MODULES(cxl_hdm_decode_decoder, "cxl_core"); -- 2.43.0