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smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b="a1/C2J+K"; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DE21606A31C; Thu, 29 Oct 2026 09:59:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=a1/C2J+K Received: by smtp.kernel.org (Postfix) with ESMTPSA id 74CED1F01828; Thu, 29 Oct 2026 09:59:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793267976; bh=IJs4QQIZ91S3U36erLUuV7NVKYoD0Sonhzo5oA3JROw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=a1/C2J+KHqCjKWwVlX/OgeWHD4/i2QFD+UZubRymThh5X7BYWAo+E2CJRJcpseUY6 CSy8IUeXftwAKaPBe6i6yZJcSzmfGwXuBr8BlziukQod4q2yvxUjI+lOd9vG+xOeuC LtlT7irolbaHY/+qVr6jmKGuFUM6eJm1OwlO7CjL1Efwi5bpU7Jw2DsHDK/3cMK8gT ONYNR4Y/Ev5CB4M2bHDLe133fQq9agvre0uGIaivEhlL8pSjS6blPVlnLhYKaOMPjC /RKJIGFCuxwqDjUQGYMKlMF5/61G6kuioOWd4gxQT3gOhfLtF2RcGjH9yZxoWM0XNk j0+ZKE9xZjTfw== From: Philipp Stanner To: Min Ma , Lizhi Hou , Oded Gabbay , "Rob Herring (Arm)" , Tomeu Vizoso , Karol Wachowski , Andrzej Kacprowski , Sumit Semwal , =?UTF-8?q?Christian=20K=C3=B6nig?= , Felix Kuehling , Alex Deucher , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Lucas Stach , Russell King , Christian Gmeiner , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , Alessio Belle , Luigi Santivetti , Qiang Yu , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Lyude Paul , Danilo Krummrich , Boris Brezillon , Steven Price , =?UTF-8?q?Adri=C3=A1n=20Larumbe?= , Liviu Dudau , Dave Airlie , Gerd Hoffmann , Matthew Brost , Philipp Stanner , Natalie Vock , Arun Pravin , Matthew Auld , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Melissa Wen , =?UTF-8?q?Ma=C3=ADra=20Canal?= , Dave Stevenson , Raspberry Pi Kernel Maintenance , Dmitry Osipenko , Gurchetan Singh , Chia-I Wu , Zack Rusin , Broadcom internal kernel review list , Thierry Reding , Mikko Perttunen , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Greg Kroah-Hartman , Sunil Khatri , Kees Cook , Jesse Zhang , =?UTF-8?q?Timur=20Krist=C3=B3f?= , Srinivasan Shanmugam , Kexin Sun , Prike Liang , David Rosca , Krzysztof Karas , Marco Crivellari , Shixiong Ou , =?UTF-8?q?Jouni=20H=C3=B6gander?= , Thadeu Lima de Souza Cascardo , Pierre-Eric Pelloux-Prayer , Joel Fernandes , Al Viro , Neill Kapron , Michael Bommarito , Sam Day , Gabriel Prostitis Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, amd-gfx@lists.freedesktop.org, etnaviv@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, imagination@lists.freedesktop.org, lima@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, nouveau@lists.freedesktop.org, virtualization@lists.linux.dev, spice-devel@lists.freedesktop.org, intel-xe@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-iio@vger.kernel.org, linux-usb@vger.kernel.org Subject: [RFC PATCH 3/6] dma-buf: Port users of dma_fence_init64() Date: Thu, 29 Oct 2026 10:55:40 +0100 Message-ID: <20261029095542.1526750-6-phasta@kernel.org> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261029095542.1526750-3-phasta@kernel.org> References: <20261029095542.1526750-3-phasta@kernel.org> X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit dma_fence_init() now natively allows for selecting 64-bit seqno support. Port all users of dma_fence_init64() to this unified method. Signed-off-by: Philipp Stanner --- drivers/dma-buf/dma-fence-chain.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c | 7 ++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 +++-- 4 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index a588f55ea4d3..706e1f5e3a23 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -261,8 +261,8 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, seqno = max(prev->seqno, seqno); } - dma_fence_init64(&chain->base, &dma_fence_chain_ops, NULL, - context, seqno); + dma_fence_init(&chain->base, &dma_fence_chain_ops, NULL, + context, seqno, BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* * dma_fence_chain_enable_signaling() is invoked while holding diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c index f6b7522c3c82..1337f7f4195f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c @@ -130,9 +130,10 @@ int amdgpu_evf_mgr_rearm(struct amdgpu_eviction_fence_mgr *evf_mgr, ev_fence->evf_mgr = evf_mgr; get_task_comm(ev_fence->timeline_name, current); spin_lock_init(&ev_fence->lock); - dma_fence_init64(&ev_fence->base, &amdgpu_eviction_fence_ops, - &ev_fence->lock, evf_mgr->ev_fence_ctx, - atomic_inc_return(&evf_mgr->ev_fence_seq)); + dma_fence_init(&ev_fence->base, &amdgpu_eviction_fence_ops, + &ev_fence->lock, evf_mgr->ev_fence_ctx, + atomic_inc_return(&evf_mgr->ev_fence_seq), + BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* Remember it for newly added BOs */ dma_fence_put(evf_mgr->ev_fence); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c index 6f1dc813ec5b..199cc1835448 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c @@ -274,8 +274,9 @@ static void amdgpu_userq_fence_init(struct amdgpu_usermode_queue *userq, bool signaled = false; spin_lock_init(&fence->lock); - dma_fence_init64(&fence->base, &amdgpu_userq_fence_ops, &fence->lock, - fence_drv->context, seq); + dma_fence_init(&fence->base, &amdgpu_userq_fence_ops, &fence->lock, + fence_drv->context, seq, + BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* Make sure the fence is visible to the hang detect worker */ dma_fence_put(userq->last_fence); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c index b0002c898386..8b9b9368956f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c @@ -100,8 +100,9 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm INIT_WORK(&f->work, amdgpu_tlb_fence_work); spin_lock_init(&f->lock); - dma_fence_init64(&f->base, &amdgpu_tlb_fence_ops, &f->lock, - vm->tlb_fence_context, atomic64_read(&vm->tlb_seq)); + dma_fence_init(&f->base, &amdgpu_tlb_fence_ops, &f->lock, + vm->tlb_fence_context, atomic64_read(&vm->tlb_seq), + BIT(DMA_FENCE_INIT_FLAG_SEQNO64)); /* TODO: We probably need a separate wq here */ dma_fence_get(&f->base); -- 2.56.0