From: Jon Hunter <jonathanh@nvidia.com>
To: Sameer Pujar <spujar@nvidia.com>, <broonie@kernel.org>,
<perex@perex.cz>, <tiwai@suse.com>,
<kuninori.morimoto.gx@renesas.com>, <robh+dt@kernel.org>,
<lgirdwood@gmail.com>
Cc: <thierry.reding@gmail.com>, <digetx@gmail.com>,
<alsa-devel@alsa-project.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <sharadg@nvidia.com>,
<mkumard@nvidia.com>, <viswanathl@nvidia.com>,
<rlokhande@nvidia.com>, <dramesh@nvidia.com>,
<atalambedu@nvidia.com>, <nwartikar@nvidia.com>,
<swarren@nvidia.com>, <nicoleotsuka@gmail.com>
Subject: Re: [PATCH v5 11/11] arm64: tegra: Add DT binding for AHUB components
Date: Fri, 7 Aug 2020 11:52:04 +0100 [thread overview]
Message-ID: <2c2f2d99-ff04-264a-5894-8505b26dda9e@nvidia.com> (raw)
In-Reply-To: <1595134890-16470-12-git-send-email-spujar@nvidia.com>
On 19/07/2020 06:01, Sameer Pujar wrote:
> This patch adds few AHUB modules for Tegra210, Tegra186 and Tegra194.
> Bindings for following modules are added.
> * AHUB added as a child node under ACONNECT
> * AHUB includes many HW accelerators and below components are added
> as its children.
> * ADMAIF
> * I2S
> * DMIC
> * DSPK (added for Tegra186 and Tegra194 only, since Tegra210 does
> not have this module)
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 217 ++++++++++++++++++++++++++++-
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 225 ++++++++++++++++++++++++++++++-
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 140 +++++++++++++++++++
> 3 files changed, 580 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index 34d249d..7869aec 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -85,7 +85,7 @@
> ranges = <0x02900000 0x0 0x02900000 0x200000>;
> status = "disabled";
>
> - dma-controller@2930000 {
> + adma: dma-controller@2930000 {
> compatible = "nvidia,tegra186-adma";
> reg = <0x02930000 0x20000>;
> interrupt-parent = <&agic>;
> @@ -140,6 +140,221 @@
> clock-names = "clk";
> status = "disabled";
> };
> +
> + tegra_ahub: ahub@2900800 {
> + compatible = "nvidia,tegra186-ahub";
> + reg = <0x02900800 0x800>;
> + clocks = <&bpmp TEGRA186_CLK_AHUB>;
> + clock-names = "ahub";
> + assigned-clocks = <&bpmp TEGRA186_CLK_AHUB>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x02900800 0x02900800 0x11800>;
> + status = "disabled";
> +
> + tegra_admaif: admaif@290f000 {
> + compatible = "nvidia,tegra186-admaif";
> + reg = <0x0290f000 0x1000>;
> + dmas = <&adma 1>, <&adma 1>,
> + <&adma 2>, <&adma 2>,
> + <&adma 3>, <&adma 3>,
> + <&adma 4>, <&adma 4>,
> + <&adma 5>, <&adma 5>,
> + <&adma 6>, <&adma 6>,
> + <&adma 7>, <&adma 7>,
> + <&adma 8>, <&adma 8>,
> + <&adma 9>, <&adma 9>,
> + <&adma 10>, <&adma 10>,
> + <&adma 11>, <&adma 11>,
> + <&adma 12>, <&adma 12>,
> + <&adma 13>, <&adma 13>,
> + <&adma 14>, <&adma 14>,
> + <&adma 15>, <&adma 15>,
> + <&adma 16>, <&adma 16>,
> + <&adma 17>, <&adma 17>,
> + <&adma 18>, <&adma 18>,
> + <&adma 19>, <&adma 19>,
> + <&adma 20>, <&adma 20>;
> + dma-names = "rx1", "tx1",
> + "rx2", "tx2",
> + "rx3", "tx3",
> + "rx4", "tx4",
> + "rx5", "tx5",
> + "rx6", "tx6",
> + "rx7", "tx7",
> + "rx8", "tx8",
> + "rx9", "tx9",
> + "rx10", "tx10",
> + "rx11", "tx11",
> + "rx12", "tx12",
> + "rx13", "tx13",
> + "rx14", "tx14",
> + "rx15", "tx15",
> + "rx16", "tx16",
> + "rx17", "tx17",
> + "rx18", "tx18",
> + "rx19", "tx19",
> + "rx20", "tx20";
> + status = "disabled";
> + };
> +
> + tegra_i2s1: i2s@2901000 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901000 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_I2S1>,
> + <&bpmp TEGRA186_CLK_I2S1_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA186_CLK_I2S1>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S1";
> + status = "disabled";
> + };
> +
> + tegra_i2s2: i2s@2901100 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901100 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_I2S2>,
> + <&bpmp TEGRA186_CLK_I2S2_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA186_CLK_I2S2>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S2";
> + status = "disabled";
> + };
> +
> + tegra_i2s3: i2s@2901200 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901200 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_I2S3>,
> + <&bpmp TEGRA186_CLK_I2S3_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA186_CLK_I2S3>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S3";
> + status = "disabled";
> + };
> +
> + tegra_i2s4: i2s@2901300 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901300 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_I2S4>,
> + <&bpmp TEGRA186_CLK_I2S4_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA186_CLK_I2S4>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S4";
> + status = "disabled";
> + };
> +
> + tegra_i2s5: i2s@2901400 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901400 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_I2S5>,
> + <&bpmp TEGRA186_CLK_I2S5_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA186_CLK_I2S5>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S5";
> + status = "disabled";
> + };
> +
> + tegra_i2s6: i2s@2901500 {
> + compatible = "nvidia,tegra186-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901500 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_I2S6>,
> + <&bpmp TEGRA186_CLK_I2S6_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA186_CLK_I2S6>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S6";
> + status = "disabled";
> + };
> +
> + tegra_dmic1: dmic@2904000 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x2904000 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_DMIC1>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA186_CLK_DMIC1>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC1";
> + status = "disabled";
> + };
> +
> + tegra_dmic2: dmic@2904100 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x2904100 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_DMIC2>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA186_CLK_DMIC2>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC2";
> + status = "disabled";
> + };
> +
> + tegra_dmic3: dmic@2904200 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x2904200 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_DMIC3>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA186_CLK_DMIC3>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC3";
> + status = "disabled";
> + };
> +
> + tegra_dmic4: dmic@2904300 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x2904300 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_DMIC4>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA186_CLK_DMIC4>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC4";
> + status = "disabled";
> + };
> +
> + tegra_dspk1: dspk@2905000 {
> + compatible = "nvidia,tegra186-dspk";
> + reg = <0x2905000 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_DSPK1>;
> + clock-names = "dspk";
> + assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <12288000>;
> + sound-name-prefix = "DSPK1";
> + status = "disabled";
> + };
> +
> + tegra_dspk2: dspk@2905100 {
> + compatible = "nvidia,tegra186-dspk";
> + reg = <0x2905100 0x100>;
> + clocks = <&bpmp TEGRA186_CLK_DSPK2>;
> + clock-names = "dspk";
> + assigned-clocks = <&bpmp TEGRA186_CLK_DSPK2>;
> + assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <12288000>;
> + sound-name-prefix = "DSPK2";
> + status = "disabled";
> + };
> + };
> };
>
> mc: memory-controller@2c00000 {
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index ea629da..bdef4b8 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -83,7 +83,7 @@
> ranges = <0x02900000 0x02900000 0x200000>;
> status = "disabled";
>
> - dma-controller@2930000 {
> + adma: dma-controller@2930000 {
> compatible = "nvidia,tegra194-adma",
> "nvidia,tegra186-adma";
> reg = <0x02930000 0x20000>;
> @@ -140,6 +140,229 @@
> clock-names = "clk";
> status = "disabled";
> };
> +
> + tegra_ahub: ahub@2900800 {
> + compatible = "nvidia,tegra194-ahub",
> + "nvidia,tegra186-ahub";
> + reg = <0x02900800 0x800>;
> + clocks = <&bpmp TEGRA194_CLK_AHUB>;
> + clock-names = "ahub";
> + assigned-clocks = <&bpmp TEGRA194_CLK_AHUB>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x02900800 0x02900800 0x11800>;
> + status = "disabled";
> +
> + tegra_admaif: admaif@290f000 {
> + compatible = "nvidia,tegra194-admaif",
> + "nvidia,tegra186-admaif";
> + reg = <0x0290f000 0x1000>;
> + dmas = <&adma 1>, <&adma 1>,
> + <&adma 2>, <&adma 2>,
> + <&adma 3>, <&adma 3>,
> + <&adma 4>, <&adma 4>,
> + <&adma 5>, <&adma 5>,
> + <&adma 6>, <&adma 6>,
> + <&adma 7>, <&adma 7>,
> + <&adma 8>, <&adma 8>,
> + <&adma 9>, <&adma 9>,
> + <&adma 10>, <&adma 10>,
> + <&adma 11>, <&adma 11>,
> + <&adma 12>, <&adma 12>,
> + <&adma 13>, <&adma 13>,
> + <&adma 14>, <&adma 14>,
> + <&adma 15>, <&adma 15>,
> + <&adma 16>, <&adma 16>,
> + <&adma 17>, <&adma 17>,
> + <&adma 18>, <&adma 18>,
> + <&adma 19>, <&adma 19>,
> + <&adma 20>, <&adma 20>;
> + dma-names = "rx1", "tx1",
> + "rx2", "tx2",
> + "rx3", "tx3",
> + "rx4", "tx4",
> + "rx5", "tx5",
> + "rx6", "tx6",
> + "rx7", "tx7",
> + "rx8", "tx8",
> + "rx9", "tx9",
> + "rx10", "tx10",
> + "rx11", "tx11",
> + "rx12", "tx12",
> + "rx13", "tx13",
> + "rx14", "tx14",
> + "rx15", "tx15",
> + "rx16", "tx16",
> + "rx17", "tx17",
> + "rx18", "tx18",
> + "rx19", "tx19",
> + "rx20", "tx20";
> + status = "disabled";
> + };
> +
> + tegra_i2s1: i2s@2901000 {
> + compatible = "nvidia,tegra194-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901000 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_I2S1>,
> + <&bpmp TEGRA194_CLK_I2S1_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA194_CLK_I2S1>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S1";
> + status = "disabled";
> + };
> +
> + tegra_i2s2: i2s@2901100 {
> + compatible = "nvidia,tegra194-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901100 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_I2S2>,
> + <&bpmp TEGRA194_CLK_I2S2_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA194_CLK_I2S2>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S2";
> + status = "disabled";
> + };
> +
> + tegra_i2s3: i2s@2901200 {
> + compatible = "nvidia,tegra194-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901200 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_I2S3>,
> + <&bpmp TEGRA194_CLK_I2S3_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA194_CLK_I2S3>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S3";
> + status = "disabled";
> + };
> +
> + tegra_i2s4: i2s@2901300 {
> + compatible = "nvidia,tegra194-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901300 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_I2S4>,
> + <&bpmp TEGRA194_CLK_I2S4_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA194_CLK_I2S4>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S4";
> + status = "disabled";
> + };
> +
> + tegra_i2s5: i2s@2901400 {
> + compatible = "nvidia,tegra194-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901400 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_I2S5>,
> + <&bpmp TEGRA194_CLK_I2S5_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA194_CLK_I2S5>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S5";
> + status = "disabled";
> + };
> +
> + tegra_i2s6: i2s@2901500 {
> + compatible = "nvidia,tegra194-i2s",
> + "nvidia,tegra210-i2s";
> + reg = <0x2901500 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_I2S6>,
> + <&bpmp TEGRA194_CLK_I2S6_SYNC_INPUT>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&bpmp TEGRA194_CLK_I2S6>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S6";
> + status = "disabled";
> + };
> +
> + tegra_dmic1: dmic@2904000 {
> + compatible = "nvidia,tegra194-dmic",
> + "nvidia,tegra210-dmic";
> + reg = <0x2904000 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_DMIC1>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA194_CLK_DMIC1>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC1";
> + status = "disabled";
> + };
> +
> + tegra_dmic2: dmic@2904100 {
> + compatible = "nvidia,tegra194-dmic",
> + "nvidia,tegra210-dmic";
> + reg = <0x2904100 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_DMIC2>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA194_CLK_DMIC2>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC2";
> + status = "disabled";
> + };
> +
> + tegra_dmic3: dmic@2904200 {
> + compatible = "nvidia,tegra194-dmic",
> + "nvidia,tegra210-dmic";
> + reg = <0x2904200 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_DMIC3>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA194_CLK_DMIC3>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC3";
> + status = "disabled";
> + };
> +
> + tegra_dmic4: dmic@2904300 {
> + compatible = "nvidia,tegra194-dmic",
> + "nvidia,tegra210-dmic";
> + reg = <0x2904300 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_DMIC4>;
> + clock-names = "dmic";
> + assigned-clocks = <&bpmp TEGRA194_CLK_DMIC4>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC4";
> + status = "disabled";
> + };
> +
> + tegra_dspk1: dspk@2905000 {
> + compatible = "nvidia,tegra194-dspk",
> + "nvidia,tegra186-dspk";
> + reg = <0x2905000 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_DSPK1>;
> + clock-names = "dspk";
> + assigned-clocks = <&bpmp TEGRA194_CLK_DSPK1>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <12288000>;
> + sound-name-prefix = "DSPK1";
> + status = "disabled";
> + };
> +
> + tegra_dspk2: dspk@2905100 {
> + compatible = "nvidia,tegra194-dspk",
> + "nvidia,tegra186-dspk";
> + reg = <0x2905100 0x100>;
> + clocks = <&bpmp TEGRA194_CLK_DSPK2>;
> + clock-names = "dspk";
> + assigned-clocks = <&bpmp TEGRA194_CLK_DSPK2>;
> + assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
> + assigned-clock-rates = <12288000>;
> + sound-name-prefix = "DSPK2";
> + status = "disabled";
> + };
> + };
> };
>
> pinmux: pinmux@2430000 {
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> index f4e0cc2..4f2853e 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> @@ -1366,6 +1366,146 @@
> clock-names = "clk";
> status = "disabled";
> };
> +
> + tegra_ahub: ahub@702d0800 {
> + compatible = "nvidia,tegra210-ahub";
> + reg = <0x702d0800 0x800>;
> + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
> + clock-names = "ahub";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x702d0000 0x702d0000 0x0000e400>;
> + status = "disabled";
> +
> + tegra_admaif: admaif@702d0000 {
> + compatible = "nvidia,tegra210-admaif";
> + reg = <0x702d0000 0x800>;
> + dmas = <&adma 1>, <&adma 1>,
> + <&adma 2>, <&adma 2>,
> + <&adma 3>, <&adma 3>,
> + <&adma 4>, <&adma 4>,
> + <&adma 5>, <&adma 5>,
> + <&adma 6>, <&adma 6>,
> + <&adma 7>, <&adma 7>,
> + <&adma 8>, <&adma 8>,
> + <&adma 9>, <&adma 9>,
> + <&adma 10>, <&adma 10>;
> + dma-names = "rx1", "tx1",
> + "rx2", "tx2",
> + "rx3", "tx3",
> + "rx4", "tx4",
> + "rx5", "tx5",
> + "rx6", "tx6",
> + "rx7", "tx7",
> + "rx8", "tx8",
> + "rx9", "tx9",
> + "rx10", "tx10";
> + status = "disabled";
> + };
> +
> + tegra_i2s1: i2s@702d1000 {
> + compatible = "nvidia,tegra210-i2s";
> + reg = <0x702d1000 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_I2S0>,
> + <&tegra_car TEGRA210_CLK_I2S0_SYNC>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S1";
> + status = "disabled";
> + };
> +
> + tegra_i2s2: i2s@702d1100 {
> + compatible = "nvidia,tegra210-i2s";
> + reg = <0x702d1100 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_I2S1>,
> + <&tegra_car TEGRA210_CLK_I2S1_SYNC>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_I2S1>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S2";
> + status = "disabled";
> + };
> +
> + tegra_i2s3: i2s@702d1200 {
> + compatible = "nvidia,tegra210-i2s";
> + reg = <0x702d1200 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_I2S2>,
> + <&tegra_car TEGRA210_CLK_I2S2_SYNC>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_I2S2>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S3";
> + status = "disabled";
> + };
> +
> + tegra_i2s4: i2s@702d1300 {
> + compatible = "nvidia,tegra210-i2s";
> + reg = <0x702d1300 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_I2S3>,
> + <&tegra_car TEGRA210_CLK_I2S3_SYNC>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_I2S3>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S4";
> + status = "disabled";
> + };
> +
> + tegra_i2s5: i2s@702d1400 {
> + compatible = "nvidia,tegra210-i2s";
> + reg = <0x702d1400 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_I2S4>,
> + <&tegra_car TEGRA210_CLK_I2S4_SYNC>;
> + clock-names = "i2s", "sync_input";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_I2S4>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <1536000>;
> + sound-name-prefix = "I2S5";
> + status = "disabled";
> + };
> +
> + tegra_dmic1: dmic@702d4000 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x702d4000 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
> + clock-names = "dmic";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC1";
> + status = "disabled";
> + };
> +
> + tegra_dmic2: dmic@702d4100 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x702d4100 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_DMIC2>;
> + clock-names = "dmic";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC2>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC2";
> + status = "disabled";
> + };
> +
> + tegra_dmic3: dmic@702d4200 {
> + compatible = "nvidia,tegra210-dmic";
> + reg = <0x702d4200 0x100>;
> + clocks = <&tegra_car TEGRA210_CLK_DMIC3>;
> + clock-names = "dmic";
> + assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC3>;
> + assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
> + assigned-clock-rates = <3072000>;
> + sound-name-prefix = "DMIC3";
> + status = "disabled";
> + };
> + };
> };
>
> spi@70410000 {
>
Thanks LGTM!
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Cheers!
Jon
--
nvpublic
next prev parent reply other threads:[~2020-08-07 11:02 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-19 5:01 [PATCH v5 00/11] Add ASoC AHUB components for Tegra210 and later Sameer Pujar
2020-07-19 5:01 ` [PATCH v5 03/11] ASoC: tegra: Add Tegra210 based DMIC driver Sameer Pujar
[not found] ` <1595134890-16470-1-git-send-email-spujar-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2020-07-19 5:01 ` [PATCH v5 01/11] ASoC: dt-bindings: tegra: Add DT bindings for Tegra210 Sameer Pujar
[not found] ` <1595134890-16470-2-git-send-email-spujar-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2020-07-20 12:34 ` Mark Brown
2020-07-20 14:20 ` Rob Herring
2020-07-19 5:01 ` [PATCH v5 02/11] ASoC: tegra: Add support for CIF programming Sameer Pujar
2020-07-19 5:01 ` [PATCH v5 04/11] ASoC: tegra: Add Tegra210 based I2S driver Sameer Pujar
2020-07-19 5:01 ` [PATCH v5 05/11] ASoC: tegra: Add Tegra210 based AHUB driver Sameer Pujar
2020-07-19 5:01 ` [PATCH v5 06/11] ASoC: tegra: Add Tegra186 based DSPK driver Sameer Pujar
2020-07-19 5:01 ` [PATCH v5 07/11] ASoC: tegra: Add Tegra210 based ADMAIF driver Sameer Pujar
2020-07-19 5:01 ` [PATCH v5 08/11] arm64: defconfig: Build AHUB component drivers Sameer Pujar
2020-08-06 18:23 ` Jon Hunter
2020-07-19 5:01 ` [PATCH v5 09/11] arm64: defconfig: Build ADMA and ACONNECT driver Sameer Pujar
2020-08-06 18:24 ` Jon Hunter
2020-07-19 5:01 ` [PATCH v5 10/11] arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano Sameer Pujar
2020-08-07 10:35 ` Jon Hunter
2020-07-19 5:01 ` [PATCH v5 11/11] arm64: tegra: Add DT binding for AHUB components Sameer Pujar
2020-08-07 10:52 ` Jon Hunter [this message]
2020-07-20 14:38 ` [PATCH v5 00/11] Add ASoC AHUB components for Tegra210 and later Mark Brown
[not found] ` <159525589435.6792.708136378511410418.b4-ty-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-21 11:52 ` Sameer Pujar
[not found] ` <72d45476-7050-187b-19d6-2ddb9b0ba97a-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2020-07-21 22:41 ` Mark Brown
2020-07-22 0:56 ` Mark Brown
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