From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH v4 04/10] ARM: tegra: Fix PWM clock programming Date: Mon, 19 Mar 2012 20:15:51 -0600 Message-ID: <4F67E857.9050402@wwwdotorg.org> References: <1331740593-10807-1-git-send-email-thierry.reding@avionic-design.de> <1331740593-10807-5-git-send-email-thierry.reding@avionic-design.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1331740593-10807-5-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, Simon Que , Bill Huang , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sascha Hauer , Arnd Bergmann , Matthias Kaehlcke , Kurt Van Dijck , Rob Herring , Grant Likely , Colin Cross , Olof Johansson , Richard Purdie , Mark Brown , Mitch Bradley , Mike Frysinger , Eric Miao , Lars-Peter Clausen , Ryan Mallon List-Id: linux-tegra@vger.kernel.org On 03/14/2012 09:56 AM, Thierry Reding wrote: > From: Simon Que > > PWM clock source registers in Tegra 2 have different clock source selection bit > fields than other registers. PWM clock source bits in CLK_SOURCE_PWM_0 register > are located at bit field bit[30:28] while others are at bit field bit[31:30] in > their respective clock source register. > > This patch updates the clock programming to correctly reflect that, by adding a > flag to indicate the alternate bit field format and checking for it when > selecting a clock source (parent clock). > > Signed-off-by: Thierry Reding > Signed-off-by: Bill Huang > Signed-off-by: Simon Que Acked-by: Stephen Warren