From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [RFC] tegra_pcm DMA buffers allocation Date: Thu, 19 Apr 2012 15:37:17 -0600 Message-ID: <4F90858D.4010206@wwwdotorg.org> References: <1334851253.13681.49.camel@marvin> <4F90708F.8070504@wwwdotorg.org> <1334869632.13681.59.camel@marvin> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1334869632.13681.59.camel@marvin> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Andrey Smirnov Cc: "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: linux-tegra@vger.kernel.org On 04/19/2012 03:07 PM, Andrey Smirnov wrote: > On Thu, 2012-04-19 at 16:07 -0400, Stephen Warren wrote: ... >> BTW, did you try running the mainline code on your board. If it's >> derived from Harmony, it should be easy to get it going. > > Last time we did there was no support for Tegra's NAND and display > controllers What do you need the NAND controllers for? I'm not 100% certain, but I believe we plan on upstreaming NAND support into U-Boot, but not the kernel, since we didn't see a need for it there IIRC. (Not that we'd stop anyone else doing it)