From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH 1/2] iommu/tegra: smmu: Add device tree support for SMMU Date: Mon, 14 May 2012 11:41:24 -0600 Message-ID: <4FB143C4.6030502@wwwdotorg.org> References: <1336636221-31575-1-git-send-email-hdoyu@nvidia.com> <1336636221-31575-2-git-send-email-hdoyu@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1336636221-31575-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Hiroshi DOYU Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Grant Likely , Rob Herring , Rob Landley , Joerg Roedel , Ohad Ben-Cohen , Tony Lindgren , Jiri Kosina , Thierry Reding , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 05/10/2012 01:50 AM, Hiroshi DOYU wrote: > The necessary info is expected to pass from DT. > > For more precise resource reservation, there shouldn't be any > overlapping of register range between SMMU and MC. SMMU register > offset needs to be calculated correctly, based on its register bank. > > Signed-off-by: Hiroshi DOYU > --- > This patch requires the following ones, sent earlier: > > DMA window: > http://article.gmane.org/gmane.linux.ports.tegra/4603 This patch has been merged even though the patch above isn't present in the kernel anywhere, let alone in the history of the iommu tree. This breaks compilation in linux-next. > AHB: > http://article.gmane.org/gmane.linux.ports.tegra/4657 This patch is in linux-next, but also is not in the history of the iommu tree, so will break bisection of the iommu tree for Tegra.