linux-tegra.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: "linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org"
	<linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH] ARM: dt: tegra: ventana: define pinmux for ddc
Date: Thu, 25 Oct 2012 14:32:18 +0800	[thread overview]
Message-ID: <5088DCF2.7030000@nvidia.com> (raw)
In-Reply-To: <50857EEF.2070707-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>

On 10/23/2012 01:14 AM, Stephen Warren wrote:
> On 10/22/2012 01:29 AM, Mark Zhang wrote:
>> On 10/19/2012 11:48 PM, Stephen Warren wrote:
>>> On 10/18/2012 11:58 PM, Mark Zhang wrote:
>>>> Define pinmux for DDC. The DDC pinmux in Ventana is 2 pins in I2C2.
>>>
>>>> +++ b/arch/arm/boot/dts/tegra20-ventana.dts
>>>
>>>> -            ddc {
>>>> -                nvidia,pins = "ddc", "owc", "spdi", "spdo",
>>>> -                    "uac";
>>>> -                nvidia,function = "rsvd2";
>>>> -            };
>>>
>>> So that removes the entries for 5 pin groups, yet below, entries are
>>> only added for the ddc and pta pingroups, so the other 4 pin groups
>>> become unconfigured.
>>>
>>
>> Right. So I think it should be changed to:
>>
>>          owc {
>>              nvidia,pins = "owc", "spdi", "spdo", "uac";
>>              nvidia,function = "rsvd2";
>>          };
>>
>> Is this right?
>
> Looks correct, yes.
>
>>>> +
>>>> +        state_i2cmux_ddc: pinmux_i2cmux_ddc {
>>>> +            ddc {
>>>> +                nvidia,pins = "ddc";
>>>> +                nvidia,function = "i2c2";
>>>> +            };
>>>> +            pta {
>>>> +                nvidia,pins = "pta";
>>>> +                nvidia,function = "rsvd4";
>>>> +            };
>>>
>>> Does this actually work? The pta pingroup is configured by the "hog"
>>> pinctrl state of the pinctrl node itself, so this state should fail to
>>> be applied since it attempts to touch the same pingroup.
>>
>> I know little about kernel pinctrl subsystem. After reading some docs
>> and codes, I think what you mean is, in Ventana's pinmux configuration,
>> pta pingroup has been defined as "hdmi" function and this can't be
>> changed(non-dynamic pinmuxing).
>> So I want to know why we have defined pta pingroup as hdmi function?
>> Can we remove this definition to make the i2cmux above working?
>
> I don't recall why pta was defined to be HDMI. The issue isn't that this
> patch changes the pinmux selection for the pta pingroup, but simply that
> both the pinctrl node's state definition, and the new I2C mux node's
> state definition both attempt to configure pingroup pta. The solution is
> most likely to simply remove the pta configuration from the main pinctrl
> node.
>

Understood. I tried to remove the hdmi function definition of pta 
pingroup yesterday then found HDMI can't work anymore. The EDID of HDMI 
monitor can't be fetched. After some debugging, I have found that it's 
caused by "i2c-mux-pinctrl" driver is loaded after drm driver. That 
makes drm driver can't get EDID data via this i2c mux adapter because it 
doesn't exist at that time. So I think we need to promote the load level 
of "i2c-mux-pinctrl" driver. Any other ideas?

Mark

  parent reply	other threads:[~2012-10-25  6:32 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-19  5:58 [PATCH] ARM: dt: tegra: ventana: define pinmux for ddc Mark Zhang
     [not found] ` <1350626311-18131-1-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-19 15:48   ` Stephen Warren
     [not found]     ` <50817668.6020709-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-22  7:29       ` Mark Zhang
     [not found]         ` <5084F5D1.7050005-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-22 17:14           ` Stephen Warren
     [not found]             ` <50857EEF.2070707-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-25  6:32               ` Mark Zhang [this message]
     [not found]                 ` <5088DCF2.7030000-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-25 15:37                   ` Stephen Warren
     [not found]                     ` <50895CB2.8040103-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-26  6:28                       ` Mark Zhang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5088DCF2.7030000@nvidia.com \
    --to=markz-ddmlm1+adcrqt0dzr+alfa@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org \
    --cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).