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* [PATCH v2] ARM: tegra: ventana: enable internal display
@ 2012-11-16  7:44 Alexandre Courbot
       [not found] ` <1353051891-26725-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
  0 siblings, 1 reply; 6+ messages in thread
From: Alexandre Courbot @ 2012-11-16  7:44 UTC (permalink / raw)
  To: Stephen Warren, Mark Zhang, Thierry Reding
  Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA, Alexandre Courbot

Enable host1x and add the rgb output, providing EDID as a binary blob.

Also add the power sequence that controls the backlight and panel. The
sequence strictly follows the order and timings of the panel
specification.

Currently the backlight device controls both backlight and panel, this
needs to be fixed once the panel framework supports power sequences.

Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/boot/dts/tegra20-ventana.dts  | 107 ++++++++++++++++++++++++++++++++-
 arch/arm/boot/dts/tegra20-ventana.edid | Bin 0 -> 128 bytes
 2 files changed, 105 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/boot/dts/tegra20-ventana.edid

diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 3e5952f..fd6c814 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -10,6 +10,16 @@
 		reg = <0x00000000 0x40000000>;
 	};
 
+	host1x {
+		dc@54200000 {
+			rgb {
+				status = "okay";
+				nvidia,edid = /incbin/("tegra20-ventana.edid");
+				backlight = <&backlight>;
+			};
+		};
+	};
+
 	pinmux {
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
@@ -469,6 +479,99 @@
 		bus-width = <8>;
 	};
 
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
+		default-brightness-level = <12>;
+
+		/* resources used by the power sequences */
+		pwms = <&pwm 2 5000000>;
+		pwm-names = "backlight";
+		power-supply = <&vdd_bl_reg>;
+		panel-supply = <&vdd_panel_reg>;
+
+		power-sequences {
+			power-on {
+				/*
+				 * Panel power and LVDS enable.
+				 * TODO: move into the panel device as soon as
+				 * panel framework supports power sequences.
+				 */
+				step0 {
+					type = "regulator";
+					id = "panel";
+					enable;
+				};
+				step1 {
+					type = "gpio";
+					gpio = <&gpio 10 0>;
+					value = <1>;
+				};
+				step2 {
+					type = "delay";
+					delay = <200000>;
+				};
+				/* Backlight sequence. This belongs here. */
+				step3 {
+					type = "regulator";
+					id = "power";
+					enable;
+				};
+				step4 {
+					type = "delay";
+					delay = <10000>;
+				};
+				step5 {
+					type = "pwm";
+					id = "backlight";
+					enable;
+				};
+				step6 {
+					type = "gpio";
+					gpio = <&gpio 28 0>;
+					value = <1>;
+				};
+			};
+
+			power-off {
+				step0 {
+					type = "gpio";
+					gpio = <&gpio 28 0>;
+					value = <0>;
+				};
+				step1 {
+					type = "pwm";
+					id = "backlight";
+					disable;
+				};
+				step2 {
+					type = "delay";
+					delay = <10000>;
+				};
+				step3 {
+					type = "regulator";
+					id = "power";
+					disable;
+				};
+				/* This also belongs to the panel sequence */
+				step4 {
+					type = "delay";
+					delay = <200000>;
+				};
+				step5 {
+					type = "gpio";
+					gpio = <&gpio 10 0>;
+					value = <0>;
+				};
+				step6 {
+					type = "regulator";
+					id = "panel";
+					disable;
+				};
+			};
+		};
+	};
+
 	regulators {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -502,7 +605,7 @@
 			enable-active-high;
 		};
 
-		regulator@3 {
+		vdd_panel_reg: regulator@3 {
 			compatible = "regulator-fixed";
 			reg = <3>;
 			regulator-name = "vdd_pnl";
@@ -512,7 +615,7 @@
 			enable-active-high;
 		};
 
-		regulator@4 {
+		vdd_bl_reg: regulator@4 {
 			compatible = "regulator-fixed";
 			reg = <4>;
 			regulator-name = "vdd_bl";
diff --git a/arch/arm/boot/dts/tegra20-ventana.edid b/arch/arm/boot/dts/tegra20-ventana.edid
new file mode 100644
index 0000000000000000000000000000000000000000..a96ab0e895515cc1f7b9e7b4f3cda359f4b6a285
GIT binary patch
literal 128
zcmZSh4+ac;BCRqEKp-o^$lM^tQ^D0#J2TvWrkYGZ2vC#}4OGa69SUGjGq6^VWVlxg
tR3Hh&{0s_Eu;4$F5m12PAA@s12p3FL0V3k#=xAtQ8186b=%~Q39sq-e8vy_S

literal 0
HcmV?d00001

-- 
1.8.0

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] ARM: tegra: ventana: enable internal display
       [not found] ` <1353051891-26725-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
@ 2012-11-16  7:51   ` Alex Courbot
  2012-11-16 17:07     ` Stephen Warren
  2012-11-19  2:55     ` Mark Zhang
  2012-11-16 20:49   ` Thierry Reding
  1 sibling, 2 replies; 6+ messages in thread
From: Alex Courbot @ 2012-11-16  7:51 UTC (permalink / raw)
  To: Stephen Warren
  Cc: Mark Zhang, Thierry Reding,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org

On Friday 16 November 2012 15:44:51 Alexandre Courbot wrote:
> Enable host1x and add the rgb output, providing EDID as a binary blob.

I would really prefer to have the EDID data fetched from DDC, but all my 
attempts have failed so far. I don't even see the DDC wires on the platform 
design guide. Mark, are you sure the EDID data you fetched with i2cget was 
actually on Ventana? I can see that the DDC lines of T2 are connected to the 
corresponding lines of the HDMI interface, but nothing similar regarding 
internal display.

Maybe we can work this out privately, on IRC?

Alex.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] ARM: tegra: ventana: enable internal display
  2012-11-16  7:51   ` Alex Courbot
@ 2012-11-16 17:07     ` Stephen Warren
       [not found]       ` <50A672DF.1070003-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
  2012-11-19  2:55     ` Mark Zhang
  1 sibling, 1 reply; 6+ messages in thread
From: Stephen Warren @ 2012-11-16 17:07 UTC (permalink / raw)
  To: Alex Courbot
  Cc: Mark Zhang, Thierry Reding,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org

On 11/16/2012 12:51 AM, Alex Courbot wrote:
> On Friday 16 November 2012 15:44:51 Alexandre Courbot wrote:
>> Enable host1x and add the rgb output, providing EDID as a binary blob.
> 
> I would really prefer to have the EDID data fetched from DDC, but all my 
> attempts have failed so far. I don't even see the DDC wires on the platform 
> design guide. Mark, are you sure the EDID data you fetched with i2cget was 
> actually on Ventana? I can see that the DDC lines of T2 are connected to the 
> corresponding lines of the HDMI interface, but nothing similar regarding 
> internal display.

Yes, there is an EDID EEPROM on Ventana. We should certainly use that.

Assuming you have CONFIG_I2C_CHARDEV=y in the kernel's .config, and the
latest Ventana .dts file which enables the I2C bus mux, then the
following command dumps the EDID:

i2cdump  -f -y 5 0x50

That should be equivalent to something like:

	nvidia,ddc-i2c-bus = <&lcd_ddc>;

with lcd_ddc pointing at /i2cmux/i2c@1

That seems to work fine for me; how about you?

For reference, the patch below, although all the whitespace is screwed
up due to pasting it; I should really start using a "proper" email
client...:

> diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
> index 9731ba9..951f432 100644
> --- a/arch/arm/boot/dts/tegra20-ventana.dts
> +++ b/arch/arm/boot/dts/tegra20-ventana.dts
> @@ -14,7 +14,7 @@
>                 dc@54200000 {
>                         rgb {
>                                 status = "okay";
> -                               nvidia,edid = /incbin/("tegra20-ventana.edid");
> +                               nvidia,ddc-i2c-bus = <&lcd_ddc>;
>                                 backlight = <&backlight>;
>                         };
>                 };
> @@ -351,7 +351,7 @@
>                         #size-cells = <0>;
>                 };
>  
> -               i2c@1 {
> +               lcd_ddc: i2c@1 {
>                         reg = <1>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] ARM: tegra: ventana: enable internal display
       [not found] ` <1353051891-26725-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
  2012-11-16  7:51   ` Alex Courbot
@ 2012-11-16 20:49   ` Thierry Reding
  1 sibling, 0 replies; 6+ messages in thread
From: Thierry Reding @ 2012-11-16 20:49 UTC (permalink / raw)
  To: Alexandre Courbot
  Cc: Stephen Warren, Mark Zhang, linux-tegra-u79uwXL29TY76Z2rM5mHXA

[-- Attachment #1: Type: text/plain, Size: 481 bytes --]

On Fri, Nov 16, 2012 at 04:44:51PM +0900, Alexandre Courbot wrote:
[...]
> +	host1x {
> +		dc@54200000 {
> +			rgb {
> +				status = "okay";
> +				nvidia,edid = /incbin/("tegra20-ventana.edid");
> +				backlight = <&backlight>;

Note that the backlight property is actually named nvidia,backlight and
needs to go into the rgb's display subnode. Also, to make this work a
patch is required to hook up the backlight with tegra-drm, which hasn't
gone into 3.8 yet, I think.

Thierry

[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] ARM: tegra: ventana: enable internal display
  2012-11-16  7:51   ` Alex Courbot
  2012-11-16 17:07     ` Stephen Warren
@ 2012-11-19  2:55     ` Mark Zhang
  1 sibling, 0 replies; 6+ messages in thread
From: Mark Zhang @ 2012-11-19  2:55 UTC (permalink / raw)
  To: Alex Courbot
  Cc: Stephen Warren, Thierry Reding,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org

Yep, I remember that I fetched EDID data by i2cget several months ago.
But I'll try this again today to make sure.

Mark
On 11/16/2012 03:51 PM, Alex Courbot wrote:
> On Friday 16 November 2012 15:44:51 Alexandre Courbot wrote:
>> Enable host1x and add the rgb output, providing EDID as a binary blob.
> 
> I would really prefer to have the EDID data fetched from DDC, but all my 
> attempts have failed so far. I don't even see the DDC wires on the platform 
> design guide. Mark, are you sure the EDID data you fetched with i2cget was 
> actually on Ventana? I can see that the DDC lines of T2 are connected to the 
> corresponding lines of the HDMI interface, but nothing similar regarding 
> internal display.
> 
> Maybe we can work this out privately, on IRC?
> 
> Alex.
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] ARM: tegra: ventana: enable internal display
       [not found]       ` <50A672DF.1070003-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
@ 2012-11-19  9:35         ` Alex Courbot
  0 siblings, 0 replies; 6+ messages in thread
From: Alex Courbot @ 2012-11-19  9:35 UTC (permalink / raw)
  To: Stephen Warren
  Cc: Mark Zhang, Thierry Reding,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org

On Saturday 17 November 2012 01:07:43 Stephen Warren wrote:
> That should be equivalent to something like:
> 
> 	nvidia,ddc-i2c-bus = <&lcd_ddc>;
> 
> with lcd_ddc pointing at /i2cmux/i2c@1
> 
> That seems to work fine for me; how about you?

Yep, this is working! DC probing gets delayed probably because i2c is not 
available when it first tries to initialize it, and as a result fb0 becomes 
available 1 second later than when we feed the EDID data from the DT. But it 
work and is the most elegant solution, so we should definitely do this.

Alex.

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2012-11-19  9:35 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2012-11-16  7:44 [PATCH v2] ARM: tegra: ventana: enable internal display Alexandre Courbot
     [not found] ` <1353051891-26725-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-16  7:51   ` Alex Courbot
2012-11-16 17:07     ` Stephen Warren
     [not found]       ` <50A672DF.1070003-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-19  9:35         ` Alex Courbot
2012-11-19  2:55     ` Mark Zhang
2012-11-16 20:49   ` Thierry Reding

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