From: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 2/4] ARM: tegra: add connection name for uart clock table
Date: Tue, 18 Dec 2012 12:35:25 +0530 [thread overview]
Message-ID: <50D015B5.8050805@nvidia.com> (raw)
In-Reply-To: <50CF9233.3010506-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
On Tuesday 18 December 2012 03:14 AM, Stephen Warren wrote:
> On 12/17/2012 05:08 AM, Laxman Dewangan wrote:
>> Add connection name "uart-clk" for the uart clock information.
> Does the UART receive more than one clock, so that it actually cares
> what the clock connection name is? If not, can we just drop this patch?
I like to have this patch because:
- In future, I want to also get the name of the clock source and set
parent of uart clock properly.
- I want to switch the parent clock source dynamically between CLKM and
PLLP to achieve more power optimization i.e. use CLKM wherever possible..
next prev parent reply other threads:[~2012-12-18 7:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-17 12:08 [PATCH 0/4] ARM: tegra: add support for highspeed serial driver Laxman Dewangan
2012-12-17 12:08 ` [PATCH 1/4] ARM: tegra30: Add support for Uart clock source divider as 15.1 Laxman Dewangan
[not found] ` <1355746101-15291-2-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-12-17 21:43 ` Stephen Warren
[not found] ` <50CF91F7.5010402-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-12-18 6:14 ` Prashant Gaikwad
[not found] ` <50D009E0.3050409-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-12-18 6:24 ` Laxman Dewangan
[not found] ` <50D00C1D.9090100-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-12-18 7:07 ` Prashant Gaikwad
2012-12-18 13:05 ` Laxman Dewangan
2012-12-17 12:08 ` [PATCH 2/4] ARM: tegra: add connection name for uart clock table Laxman Dewangan
[not found] ` <1355746101-15291-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-12-17 21:44 ` Stephen Warren
[not found] ` <50CF9233.3010506-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-12-18 7:05 ` Laxman Dewangan [this message]
2012-12-18 16:55 ` Stephen Warren
2012-12-17 12:08 ` [PATCH 3/4] ARM: tegra: Add OF_DEV_AUXDATA for uart driver in board dt Laxman Dewangan
2012-12-17 21:47 ` Stephen Warren
[not found] ` <50CF92D5.6090805-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-12-18 6:18 ` Prashant Gaikwad
[not found] ` <50D00AB9.8090800-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-12-18 7:00 ` Laxman Dewangan
2012-12-17 12:08 ` [PATCH 4/4] ARM: tegra: dts: add dma requestor and port numbers for serial controller Laxman Dewangan
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