From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH] clk: tegra: No 7.1 super clk dividers on Tegra20 Date: Fri, 08 Feb 2013 10:38:39 -0700 Message-ID: <5115381F.9000308@wwwdotorg.org> References: <1360327453-29242-1-git-send-email-pdeschrijver@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1360327453-29242-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Peter De Schrijver Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Stephen Warren , Mike Turquette , Prashant Gaikwad , Joseph Lo , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 02/08/2013 05:44 AM, Peter De Schrijver wrote: > Unlike Tegra30, Tegra20 does not have a 7.1 divider for the CPU superclk. > Remove the clocks related to the divider. I assume there's no particular need to take this for 3.9; it can wait until 3.10?