From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laxman Dewangan Subject: Re: [PATCH] clk: tegra: initialise parent of uart clocks Date: Tue, 12 Feb 2013 20:49:47 +0530 Message-ID: <511A5D93.1040101@nvidia.com> References: <1360682233-23016-1-git-send-email-ldewangan@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1360682233-23016-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Laxman Dewangan Cc: Stephen Warren , "mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" , Prashant Gaikwad , Peter De Schrijver , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: linux-tegra@vger.kernel.org On Tuesday 12 February 2013 08:47 PM, Laxman Dewangan wrote: > Initialise the parent of UARTs to PLLP and disabling clock by > default. > > Signed-off-by: Laxman Dewangan > --- Please ignore this, I just sent the other patch as V2 to have more appropriate version. Please review the Patch V2. Sorry for spam/inconvenience.