From: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH V2 4/5] ARM: DT: tegra114: add KBC controller DT entry
Date: Mon, 11 Mar 2013 23:29:26 +0530 [thread overview]
Message-ID: <513E1B7E.8090203@nvidia.com> (raw)
In-Reply-To: <513E17C1.1070305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
On Monday 11 March 2013 11:13 PM, Stephen Warren wrote:
> On 03/09/2013 11:11 AM, Laxman Dewangan wrote:
>> NVIDIA's Tegra114 SoCs have the matrix keyboard controller which
>> supports 11x8 type of matrix. The number of rows and columns
>> are configurable.
>>
>> Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc",
>> "nvidia,tegra20-kbc".
> I thought the HW really wasn't compatible with Tegra20 due to the
> reduced number of rows/columns/pins supported?
Hw controller is really compatible. Only thing is that there is no
physical pins on SoC for KBC-ROW11 to KBC-ROW15.
Because, there is no physical pins for ROW11 to ROW15, we asked to
remove programming/reference this rows from TRM of T114 to consistent
with SoCs.
next prev parent reply other threads:[~2013-03-11 17:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-09 18:11 [PATCH V2 0/5] ARM: DT: tegra114: Add DT entry for different controller Laxman Dewangan
2013-03-09 18:11 ` [PATCH V2 1/5] ARM: DT: tegra114: add APB DMA controller DT entry Laxman Dewangan
2013-03-10 22:37 ` Thierry Reding
2013-03-09 18:11 ` [PATCH V2 2/5] ARM: DT: tegra114: Add i2c " Laxman Dewangan
[not found] ` <1362852678-13421-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-03-10 22:39 ` Thierry Reding
[not found] ` <20130310223936.GF4743-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2013-03-11 17:35 ` Stephen Warren
2013-03-11 17:41 ` Stephen Warren
2013-03-09 18:11 ` [PATCH V2 5/5] ARM: DT: tegra114: Add spi " Laxman Dewangan
[not found] ` <1362852678-13421-6-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-03-10 22:51 ` Thierry Reding
[not found] ` <1362852678-13421-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-03-09 18:11 ` [PATCH V2 3/5] ARM: DT: tegra114:add aliases and DMA requestor for serial controller Laxman Dewangan
[not found] ` <1362852678-13421-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-03-10 22:42 ` Thierry Reding
[not found] ` <20130310224219.GG4743-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2013-03-11 17:42 ` Stephen Warren
2013-03-11 17:38 ` Stephen Warren
2013-03-09 18:11 ` [PATCH V2 4/5] ARM: DT: tegra114: add KBC controller DT entry Laxman Dewangan
2013-03-11 17:43 ` Stephen Warren
[not found] ` <513E17C1.1070305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-03-11 17:59 ` Laxman Dewangan [this message]
2013-03-11 18:47 ` Stephen Warren
2013-03-11 22:15 ` [PATCH V2 0/5] ARM: DT: tegra114: Add DT entry for different controller Stephen Warren
[not found] ` <513E5771.9000408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-03-12 10:11 ` Laxman Dewangan
[not found] ` <513EFF36.50107-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-03-12 18:31 ` Stephen Warren
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