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From: Stephen Warren <swarren@wwwdotorg.org>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Jay Agarwal <jagarwal@nvidia.com>,
	"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
	"thierry.reding@avionic-design.de"
	<thierry.reding@avionic-design.de>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"olof@lixom.net" <olof@lixom.net>,
	Hiroshi Doyu <hdoyu@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	"mturquette@linaro.org" <mturquette@linaro.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	Juha Tukkinen <jtukkinen@nvidia.com>,
	Krishna Thota <kthota@nvidia.com>
Subject: Re: [PATCH 2/3] ARM: dts: tegra: Correct PCIe entry
Date: Tue, 09 Apr 2013 09:46:04 -0600	[thread overview]
Message-ID: <516437BC.8060707@wwwdotorg.org> (raw)
In-Reply-To: <20130409083050.GQ3572@tbergstrom-lnx.Nvidia.com>

On 04/09/2013 02:30 AM, Peter De Schrijver wrote:
> On Mon, Apr 08, 2013 at 08:27:00PM +0200, Stephen Warren wrote:
>> On 04/08/2013 09:41 AM, Jay Agarwal wrote:
>>> Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
>>
>> Your s-o-b line should be below the patch description, not above it.
>> Please see Documentation/SubmittingPatches.
>>
>> I also don't see a --- line between the patch description and diffstat.
>> How are you generating these patch emails? Please see our internal wiki,
>> or other git documentation.
>>
>>> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
>>
>>> -		clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml";
>>> +		clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml0";
>>
>> Can you please explain more about this change?
>>
>> I see the Tegra clock driver provides both a "cml0" and a "cml1" clock.
>> Are both of those used for PCIe?
>>
> 
> cml0 is used for pcie and cml1 is used for sata.

OK, so the PCIe drivers' clock-names property may as well contain just
cml then. Same for SATA. The clock name at the provider isn't relevant.

  reply	other threads:[~2013-04-09 15:46 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-08 15:41 [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support Jay Agarwal
2013-04-08 18:11 ` Stephen Warren
2013-04-12 14:58   ` Jay Agarwal
2013-04-12 15:34     ` Stephen Warren
2013-04-13 10:23       ` Thierry Reding
2013-04-08 18:21 ` Stephen Warren
2013-04-12 16:43   ` Jay Agarwal
2013-04-12 17:01     ` Stephen Warren
2013-04-12 17:06       ` Jay Agarwal
2013-04-12 18:29         ` Stephen Warren
     [not found] ` <1365435688-4179-1-git-send-email-jagarwal-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-04-08 15:41   ` [PATCH 2/3] ARM: dts: tegra: Correct PCIe entry Jay Agarwal
2013-04-08 18:27     ` Stephen Warren
2013-04-09  8:30       ` Peter De Schrijver
2013-04-09 15:46         ` Stephen Warren [this message]
2013-04-12 15:03         ` Jay Agarwal
2013-04-08 15:41   ` [PATCH 3/3] ARM: dts: tegra: Add PCIe entry for cardhu Jay Agarwal
2013-04-08 18:32     ` Stephen Warren
2013-04-10 17:23   ` [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support Stephen Warren
2013-05-06 19:49   ` Stephen Warren

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