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From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] ARM: tegra: emc: correction of ram-code parsing from dt
Date: Fri, 17 May 2013 17:53:19 -0600	[thread overview]
Message-ID: <5196C2EF.2060408@wwwdotorg.org> (raw)
In-Reply-To: <1368390409-14156-1-git-send-email-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On 05/12/2013 02:26 PM, Dmitry Osipenko wrote:
> Change tegra_emc_ramcode_devnode() to get ram-code from child node instead of
> parent.

I've applied this to Tegra's for-3.11/soc branch.

> For me it looks like it should be better to place ram-code inside of table
> nodes, so num_tables will be incremented if table has valid ram-code and table
> with invalid ram-code will be skipped on getting table params loop. This avoids
> placing of #address-cells and #size-cells in nodes with ram-code.
> If it looks ok, I may send new patch.

That would be a change to the DT binding. DT bindings are supposed to be
a stable ABI, so we wouldn't want to change the binding unless there was
a strong reason. I don't think there is one here.

  parent reply	other threads:[~2013-05-17 23:53 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-12 20:26 [PATCH] ARM: tegra: emc: correction of ram-code parsing from dt Dmitry Osipenko
     [not found] ` <1368390409-14156-1-git-send-email-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-17 23:53   ` Stephen Warren [this message]
     [not found]     ` <5196C2EF.2060408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-05-20 10:06       ` Dmitry Osipenko

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