From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
Prashant Gaikwad
<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 0/2] PLL m,n,p init from SoC files
Date: Wed, 05 Jun 2013 10:25:24 -0600 [thread overview]
Message-ID: <51AF6674.3020701@wwwdotorg.org> (raw)
In-Reply-To: <1370440301-3562-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 06/05/2013 07:51 AM, Peter De Schrijver wrote:
> The m,n,p fields don't have the same bit offset and width across all PLLs.
> This patchset allows SoC specific files to indicate the offset and width.
> It also provides the data for Tegra114.
The series,
Tested-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
next prev parent reply other threads:[~2013-06-05 16:25 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-05 13:51 [PATCH 0/2] PLL m,n,p init from SoC files Peter De Schrijver
[not found] ` <1370440301-3562-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-05 13:51 ` [PATCH 1/2] clk: tegra: allow " Peter De Schrijver
2013-06-05 13:51 ` [PATCH 2/2] clk: tegra: PLL m,n,p init for Tegra114 Peter De Schrijver
2013-06-05 13:54 ` [PATCH 0/2] PLL m,n,p init from SoC files Peter De Schrijver
2013-06-05 16:25 ` Stephen Warren [this message]
2013-06-12 0:39 ` Mike Turquette
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