From: Stephen Warren <swarren@wwwdotorg.org>
To: Joseph Lo <josephl@nvidia.com>
Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 02/11] ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL
Date: Wed, 26 Jun 2013 13:31:00 -0600 [thread overview]
Message-ID: <51CB4174.1050700@wwwdotorg.org> (raw)
In-Reply-To: <1372152475-18617-3-git-send-email-josephl@nvidia.com>
On 06/25/2013 03:27 AM, Joseph Lo wrote:
> Adding a flag for tegra_disable_clean_inv_dcache to flush cache as LoUIS
> or ALL. After this patch, the v7_flush_dcache_louis is used for CPU hotplug
> and CPU suspend in CPU power down (e.g. CPU idle power-down mode) case. And
> the v7_flush_dcache_all is used for CPU cluster power down (e.g. suspend to
> LP2 mode).
> diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h
> +/* flag of tegra_disable_clean_inv_dcache to do LoUIS or all */
> +#define TEGRA_FLUSH_CACHE_LOUIS 0x10
> +#define TEGRA_FLUSH_CACHE_ALL 0x20
Is there a reason those two values aren't just 0 and 1; they only seem
to be used internally to switch between two function calls, and not
passed to those calls or written to HW.
next prev parent reply other threads:[~2013-06-26 19:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-25 9:27 [PATCH 00/11] ARM: tegra114: add support for system suspend Joseph Lo
[not found] ` <1372152475-18617-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-25 9:27 ` [PATCH 01/11] ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 in tegra_resume Joseph Lo
2013-06-25 9:27 ` [PATCH 02/11] ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL Joseph Lo
2013-06-26 19:31 ` Stephen Warren [this message]
[not found] ` <51CB4174.1050700-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:07 ` Joseph Lo
2013-06-25 9:27 ` [PATCH 03/11] ARM: tegra114: set up the correct L2 data RAM latency for Cortex-A15 Joseph Lo
2013-06-25 9:27 ` [PATCH 04/11] ARM: tegra114: add low level support code for cluster power down Joseph Lo
2013-06-25 9:27 ` [PATCH 05/11] ARM: tegra114: shut off the CPU rail when the last CPU in suspend Joseph Lo
[not found] ` <1372152475-18617-6-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-26 19:36 ` Stephen Warren
[not found] ` <51CB42A0.4070103-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:10 ` Joseph Lo
2013-06-25 9:27 ` [PATCH 06/11] ARM: tegra114: hook tegra_tear_down_cpu function Joseph Lo
[not found] ` <1372152475-18617-7-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-27 10:13 ` Thierry Reding
2013-06-27 10:22 ` Joseph Lo
2013-06-27 17:48 ` Stephen Warren
[not found] ` <51CC7B01.30503-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-28 18:34 ` Thierry Reding
2013-06-25 9:27 ` [PATCH 07/11] ARM: tegra114: flowctrl: add support for cpu_suspend_enter/exit Joseph Lo
2013-06-25 9:27 ` [PATCH 08/11] clk: tegra114: add suspend/resume function for tegar_cpu_car_ops Joseph Lo
[not found] ` <1372152475-18617-9-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-26 19:38 ` Stephen Warren
[not found] ` <51CB432E.9080006-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:12 ` Joseph Lo
2013-07-30 21:21 ` Mike Turquette
2013-07-31 2:27 ` Joseph Lo
[not found] ` <1375237637.1231.1.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-07-31 3:37 ` Mike Turquette
2013-06-25 9:27 ` [PATCH 09/11] ARM: tegar: remove the limitation that Tegra114 can't support suspend Joseph Lo
[not found] ` <1372152475-18617-10-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-26 10:48 ` Thierry Reding
2013-06-26 11:20 ` Joseph Lo
2013-06-26 17:46 ` Stephen Warren
2013-06-26 19:40 ` Stephen Warren
[not found] ` <51CB4398.8050900-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:01 ` Joseph Lo
2013-06-25 9:27 ` [PATCH 10/11] ARM: dts: tegra114: dalmore: add GPIO power key support Joseph Lo
2013-06-25 9:27 ` [PATCH 11/11] ARM: dts: tegra114: dalmore: add PM configurations for PMC Joseph Lo
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