From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH v2 04/22] ARM: dt: tegra30: iommu: Add "nvidia,swgroup" Date: Tue, 16 Jul 2013 17:10:32 -0600 Message-ID: <51E5D2E8.5060200@wwwdotorg.org> References: <1373021097-32420-1-git-send-email-hdoyu@nvidia.com> <1373021097-32420-5-git-send-email-hdoyu@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1373021097-32420-5-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Hiroshi Doyu Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 07/05/2013 04:44 AM, Hiroshi Doyu wrote: > This is a bitmap that indicates which HardWare Accelerators(HWA) are > supported on Tegra30 SoC. > diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi > + nvidia,swgroup = TEGRA30_SWGROUP_ALL; That property isn't in the binding document. We can't add properties that aren't documented. Macros should not include structural syntax; the < > around the cell value is part of the macro the way you've written it, but shouldn't be. It'd be simpler to just write: nvidia,swgroup = <0x00000000 0x000779ff>; We should only extend the binding in a backwards-compatible fashion, so we can't require that DTs contain this value. At least, there should be a default value defined for when the property doesn't exist.