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Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [Patch v5 1/4] memory: tegra: Add memory controller channels support Content-Language: en-US To: Krzysztof Kozlowski , robh+dt@kernel.org, thierry.reding@gmail.com, digetx@gmail.com, jonathanh@nvidia.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Cc: vdumpa@nvidia.com, Snikam@nvidia.com References: <20220316092525.4554-1-amhetre@nvidia.com> <20220316092525.4554-2-amhetre@nvidia.com> <81aa7be7-0bfa-05e6-624a-393e6810dc61@kernel.org> From: Ashish Mhetre In-Reply-To: <81aa7be7-0bfa-05e6-624a-393e6810dc61@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: MA1PR0101CA0045.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:22::31) To SA0PR12MB4349.namprd12.prod.outlook.com (2603:10b6:806:98::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 83a1fd00-8600-4810-9725-08da0c2e6a83 X-MS-TrafficTypeDiagnostic: DM4PR12MB5165:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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>> >> + if (mc->soc->ops && mc->soc->ops->map_regs) { >> + err = mc->soc->ops->map_regs(mc, pdev); >> + if (err < 0) >> + return err; >> + } >> + >> mc->debugfs.root = debugfs_create_dir("mc", NULL); >> >> if (mc->soc->ops && mc->soc->ops->probe) { >> diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c >> index 3d153881abc1..a8a45e6ff1f1 100644 >> --- a/drivers/memory/tegra/tegra186.c >> +++ b/drivers/memory/tegra/tegra186.c >> @@ -139,11 +139,62 @@ static int tegra186_mc_probe_device(struct tegra_mc *mc, struct device *dev) >> return 0; >> } >> >> +static int tegra186_mc_map_regs(struct tegra_mc *mc, >> + struct platform_device *pdev) >> +{ >> + struct device_node *np = pdev->dev.parent->of_node; >> + int num_dt_channels, reg_cells = 0; >> + struct resource *res; >> + int i, ret; >> + u32 val; >> + >> + ret = of_property_read_u32(np, "#address-cells", &val); >> + if (ret) { >> + dev_err(&pdev->dev, "missing #address-cells property\n"); >> + return ret; >> + } >> + >> + reg_cells = val; >> + >> + ret = of_property_read_u32(np, "#size-cells", &val); >> + if (ret) { >> + dev_err(&pdev->dev, "missing #size-cells property\n"); >> + return ret; >> + } >> + >> + reg_cells += val; >> + >> + num_dt_channels = of_property_count_elems_of_size(pdev->dev.of_node, "reg", >> + reg_cells * sizeof(u32)); >> + /* >> + * On tegra186 onwards, memory controller support multiple channels. >> + * Apart from regular memory controller channels, there is one broadcast >> + * channel and one for stream-id registers. >> + */ >> + if (num_dt_channels < mc->soc->num_channels + 2) { >> + dev_warn(&pdev->dev, "MC channels are missing, please update\n"); > > How did you address our previous comments about ABI break? I really do > not see it. > In v4 patch, error was returned from here and probe failed causing ABI break. In v5, we are checking if number of reg items in DT is as expected or not. If number of reg items are less then we are just printing warning to update DT and returning 0. So probe won't fail and driver will work as expected. Also I had tested just driver patches with existing DT and it worked fine. > Best regards, > Krzysztof