From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/2] ARM: tegra: Correct Tegra30 SMMU register map
Date: Tue, 12 Nov 2013 12:19:04 -0700 [thread overview]
Message-ID: <52827F28.7020305@wwwdotorg.org> (raw)
In-Reply-To: <1383796706-10729-2-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 11/06/2013 08:58 PM, Mark Zhang wrote:
> Correct Tegra30 SMMU register map.
Some more explanation is required here re: why this layout is more
correct than what's there.
Do you need to edit the reg property in Tegra30's memory-controller node
too; that's what all these reg ranges are interleaved with, so
presumably if there was a mistake in the SMMU ranges, there's the
equivalent inverse mistake in the MC's ranges?
The DT binding for nvidia,tegra30-smmu states that reg should include
precisely 3 entries. This patch no longer conforms to that. The binding
needs to be re-written to explain the interleaving issue, and say that
an arbitrary number of ranges may be provided. The same issue exists in
the nvidia,tegra30-mc DT binding.
I think I'm beginning to regret separating out the MC and SMMU into
separate DT nodes:-(
next prev parent reply other threads:[~2013-11-12 19:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-07 3:58 [PATCH 0/2] Correct SMMU register map Mark Zhang
[not found] ` <1383796706-10729-1-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-07 3:58 ` [PATCH 1/2] ARM: tegra: Correct Tegra30 " Mark Zhang
[not found] ` <1383796706-10729-2-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-12 19:19 ` Stephen Warren [this message]
[not found] ` <52827F28.7020305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 1:14 ` Mark Zhang
2013-11-13 5:56 ` Hiroshi Doyu
2013-11-07 3:58 ` [PATCH 2/2] ARM: tegra: Correct Tegra114 " Mark Zhang
2013-11-07 6:38 ` [PATCH 0/2] Correct " Hiroshi Doyu
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