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From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH 2/6] ARM: tegra114: fuse: add DFLL FCPU minimum voltage override test function
Date: Thu, 19 Dec 2013 16:12:05 -0700	[thread overview]
Message-ID: <52B37D45.4090905@wwwdotorg.org> (raw)
In-Reply-To: <20131219123652.3226.98741.stgit@tamien>

On 12/19/2013 05:36 AM, Paul Walmsley wrote:
> Add a function to test the internal Tegra114 chip fuse that indicates
> whether the VDD_CPU lower voltage limit for the fast CPU cluster
> should be overridden.

> diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c

> +bool tegra114_fuse_read_min_vdd_cpu_override(void)
> +{
> +	if (tegra_chip_id != TEGRA114)
> +		return -EINVAL;

-EINVAL doesn't translate to "bool" too well...

> +
> +	return tegra_spare_fuse(TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE) ? true :
> +		false;

In the spirit of my comment on patch 1 and consistency, instead perhaps
just read this fuse at boot, and assign it to a global?

BTW, why the need for "? true : false" - doesn't the compiler do the
conversion correctly itself. Perhaps it's to avoid a performance
warning, in which case a leading !! seems to be more popular.

  reply	other threads:[~2013-12-19 23:12 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-19 12:36 [PATCH 0/6] clk: tegra: add basic support for the DFLL clocksource Paul Walmsley
2013-12-19 12:36 ` [PATCH 1/6] ARM: tegra: fuse: add functions to read speedo ID and process ID Paul Walmsley
2013-12-19 23:09   ` Stephen Warren
2013-12-19 12:36 ` [PATCH 2/6] ARM: tegra114: fuse: add DFLL FCPU minimum voltage override test function Paul Walmsley
2013-12-19 23:12   ` Stephen Warren [this message]
2013-12-19 12:37 ` [PATCH 3/6] clk: tegra: add library for the DFLL clocksource (open-loop mode) Paul Walmsley
2013-12-19 23:57   ` Stephen Warren
2013-12-19 12:49 ` [PATCH 4/6] ARM: DTS: tegra: add the DFLL IP block to the T114 SoC file Paul Walmsley
2013-12-20  0:05   ` Stephen Warren
     [not found]     ` <52B389CD.8010004-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-01-14  6:27       ` Paul Walmsley
2014-01-14  6:32         ` Paul Walmsley
2014-01-15 19:50         ` Gerhard Sittig
     [not found]           ` <20140115195025.GU20094-kDjWylLy9wD0K7fsECOQyeGNnDKD8DIp@public.gmane.org>
2014-01-15 20:09             ` Paul Walmsley
     [not found]     ` <52D4D314.3000208@nvidia.com>
     [not found]       ` <52D4D314.3000208-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-01-14 17:43         ` Stephen Warren
2013-12-19 12:49 ` [PATCH 5/6] ARM: DTS: tegra: add DFLL integration to the Dalmore DTS file Paul Walmsley
2013-12-20  0:10   ` Stephen Warren
     [not found]     ` <52B38AE9.2030209-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-01-14  6:36       ` Paul Walmsley
2013-12-19 12:49 ` [PATCH 6/6] clk: tegra: add Tegra114 FCPU DFLL clocksource platform driver Paul Walmsley
2013-12-20  0:18   ` Stephen Warren

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