From: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Alexandre Courbot
<acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Ben Skeggs <bskeggs-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: "nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
<nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
"dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
<dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
<gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH 0/3] drm/gk20a: support for reclocking
Date: Thu, 10 Jul 2014 12:50:17 +0300 [thread overview]
Message-ID: <53BE61D9.4020202@nvidia.com> (raw)
In-Reply-To: <1404977677-22248-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Does GK20A itself have any kind of thermal protection capabilities?
Upstream SOCTHERM support is not yet available (though I have a driver
in my tree), so we are thinking of disabling CPU DVFS on boards that
don't have always-on active cooling for now. Same might be necessary for
GPU as well.
On 10/07/14 10:34, Alexandre Courbot wrote:
> This series adds support for reclocking on GK20A. The first two patches touch
> the clock subsystem to allow GK20A to operate, by making the presence of the
> thermal and voltage devices optional, and allowing pstates to be provided
> directly instead of being probed using the BIOS (which Tegra does not have).
>
> The last patch adds the GK20A clock device. Arguably the clock can be seen as a
> stripped-down version of what is seen on NVE0, however instead of using NVE0
> support has been written from scratch using the ChromeOS kernel as a basis.
> There are several reasons for this:
>
> - The ChromeOS driver uses a lookup table for the P coefficient which I could
> not find in the NVE0 driver,
> - Some registers that NVE0 expects to find are not present on GK20A (e.g.
> 0x137120 and 0x137140),
> - Calculation of MNP is done differently from what is performed in
> nva3_pll_calc(), and it might be interesting to compare the two methods,
> - All the same, the programming sequence is done differently in the ChromeOS
> driver and NVE0 could possibly benefit from it (?)
>
> It would be interesting to try and merge both, but for now I prefer to have the
> two coexisting to ensure proper operation on GK20A and besure I don't break
> dGPU support. :)
>
> Regarding the first patch, one might argue that I could as well add thermal
> and voltage devices to GK20A. The reason this is not done is because these
> currently depend heavily on the presence of a BIOS, and will require a rework
> similar to that done in patch 2 for clocks. I would like to make sure this
> approach is approved because applying it to other subdevs.
>
> Alexandre Courbot (3):
> drm/nouveau/clk: make therm and volt devices optional
> drm/nouveau/clk: support for non-BIOS pstates
> drm/gk20a: reclocking support
>
> drivers/gpu/drm/nouveau/Makefile | 1 +
> drivers/gpu/drm/nouveau/core/engine/device/nve0.c | 1 +
> .../gpu/drm/nouveau/core/include/subdev/clock.h | 9 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/base.c | 52 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/gk20a.c | 670 +++++++++++++++++++++
> drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c | 4 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/nv40.c | 4 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c | 2 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 4 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c | 4 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c | 4 +-
> drivers/gpu/drm/nouveau/core/subdev/clock/nve0.c | 4 +-
> 12 files changed, 725 insertions(+), 34 deletions(-)
> create mode 100644 drivers/gpu/drm/nouveau/core/subdev/clock/gk20a.c
>
next prev parent reply other threads:[~2014-07-10 9:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-10 7:34 [PATCH 0/3] drm/gk20a: support for reclocking Alexandre Courbot
[not found] ` <1404977677-22248-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-10 7:34 ` [PATCH 1/3] drm/nouveau/clk: make therm and volt devices optional Alexandre Courbot
2014-07-10 7:34 ` [PATCH 2/3] drm/nouveau/clk: support for non-BIOS pstates Alexandre Courbot
2014-07-10 7:34 ` [PATCH 3/3] drm/gk20a: reclocking support Alexandre Courbot
2014-07-10 9:43 ` [PATCH 0/3] drm/gk20a: support for reclocking Peter De Schrijver
[not found] ` <20140710094300.GP23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-11 1:49 ` Alexandre Courbot
[not found] ` <53BF4292.1060009-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-11 2:01 ` Ben Skeggs
[not found] ` <CACAvsv7O-Jw_h0=V4URM7YE3TQjS3UgN=+tOo-wxb5YC6BuL8Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-07-11 10:56 ` Peter De Schrijver
2014-07-11 10:54 ` Peter De Schrijver
[not found] ` <20140711105427.GZ23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-14 2:13 ` Alexandre Courbot
2014-07-10 9:50 ` Mikko Perttunen [this message]
2014-07-11 1:42 ` Alexandre Courbot
[not found] ` <53BF4102.6010807-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-11 7:41 ` Martin Peres
2014-07-11 1:07 ` [Nouveau] " Ben Skeggs
2014-07-11 1:38 ` Alexandre Courbot
[not found] ` <53BF4029.5060301-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-14 2:08 ` Alexandre Courbot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53BE61D9.4020202@nvidia.com \
--to=mperttunen-ddmlm1+adcrqt0dzr+alfa@public.gmane.org \
--cc=acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org \
--cc=bskeggs-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org \
--cc=dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
--cc=gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
--cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox