From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Subject: Re: [PATCH] ARM: tegra: remove pinmux setup from Tegra124 boards
Date: Wed, 13 Aug 2014 10:27:00 -0600
Message-ID: <53EB91D4.8050402@wwwdotorg.org>
References: <1403563506-6461-1-git-send-email-swarren@wwwdotorg.org> <1407921548.5835.20.camel@weser.hi.pengutronix.de>
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To: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>, Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Dylan Reid <dgreid-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
List-Id: linux-tegra@vger.kernel.org

On 08/13/2014 03:19 AM, Lucas Stach wrote:
> Hi Stephen,
>
> sorry for getting on this late, I completely missed this and only now
> stumbled upon this.
>
> I'm not really fond of this change. The barebox bootloader completely
> probes itself from DT, including the pinmux. We try to stay as close as
> possible to the upstream kernel DTs and only introduce minimal changes.
> Removing the pinmux from the DTS will completely break barebox, as we
> don't have any static pinmux tables there.

Probing bootloaders from DT seems like a huge mistake to me, but that's 
probably a separate discussion.

The pinmux generator scripts spit out DT, so you can easily generate a 
DT representation of the board pinmux, and add that to the DT file in 
Barebox. See https://github.com/NVIDIA/tegra-pinmux-scripts.

> In order to not break the bootloader use-case I strongly advocate to
> keep the static pinmux in the DT. Can't we just rename the the state to
> something like "initial", so Linux won't try to set it by default?

That doesn't seem like a good idea. There's no reason for the DT to 
contain data that we know has no use.

> This
> way we could still keep the information in the DT, while being able to
> say "if you are going to program the initial pinmux state you need to
> follow the sequence defined by NVIDIA syseng".
>
> This obviously would make the naming of the state part of the binding,
> but I think this may be acceptable.
>
> Regards,
> Lucas
>
> Am Montag, den 23.06.2014, 16:45 -0600 schrieb Stephen Warren:
>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>
>> The defined mechanism for programming the Tegra pinmux is to perform all
>> of the following at once:
>>
>> - Set the CLAMP_INPUTS_WHEN_TRISTATED PMC register bit.
>> - Set up any GPIO pins to their "initial" state.
>> - Program all pinmux settings in one go.
>>
>> Other methods such as:
>>
>> - Not setting CLAMP_INPUTS_WHEN_TRISTATED.
>> - Not setting GPIOs to their "initial" state before programming the
>>    pinmux settings of the related pin, in particular the mux function.
>> - Not programming the entire pinmux at once, in order to avoid
>>    possible conflicting settings.
>>
>> ... are not qualified or supported by NVIDIA ASIC/syseng. They could
>> cause glitches or undesired output levels on some pins, or controller
>> malfunction.
>>
>> While we've been getting away with doing something different on many
>> Tegra boards without issue, I believe we've just been getting lucky.
>> I'd like to switch all Tegra124 systems to the correct scheme now so
>> they provide the right example to follow, and require that any new
>> boards we support upstream work in the same fashion.
>>
>> While it would be nice to update boards containing older SoCs for
>> consistency, I don't anticipate doing so. It's too much churn to change
>> at this time. At least with all Tegra124 boards converted, the most
>> recent boards provide the correct example.
>>
>> Since the bootloader needs to reprogram the pinmux to access certain
>> peripherals, it must program the entire pinmux due to the supported
>> rules above. As such, there is no need to program any part of the pinmux
>> from the kernel, unless dynamic pinmuxing is used. Hence, this change
>> removes all static pinmux from all Tegra124 board DTs.
>>
>> The following U-Boot commits fully initialize the pinmux:
>>
>> Jetson TK1: 4ff213b8e478 ARM: tegra: clamp inputs on Jetson TK1
>>
>> Venice2: 3365479ce78a ARM: tegra: Venice2 pinmux spreadsheet updates
>>
>> Without those commits, the only fallout I see from this change is that
>> HDMI on Venice2 no longer works. Given the very small user-base of this
>> platform, I feel that requiring a bootloader update is reasonable.
>>
>> Cc: Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Cc: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Cc: Dylan Reid <dgreid-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Cc: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> Cc: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> Cc: Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>
>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>   arch/arm/boot/dts/tegra124-jetson-tk1.dts | 1320 -----------------------------
>>   arch/arm/boot/dts/tegra124-venice2.dts    |  541 ------------
>>   2 files changed, 1861 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> index 16082c0bdaca..4935910b16e2 100644
>> --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> @@ -30,1326 +30,6 @@
>>   		};
>>   	};
>>
>> -	pinmux: pinmux@0,70000868 {
>> -		pinctrl-names = "default";
>> -		pinctrl-0 = <&state_default>;
>> -
>> -		state_default: pinmux {
>> -			clk_32k_out_pa0 {
>> -				nvidia,pins = "clk_32k_out_pa0";
>> -				nvidia,function = "soc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			uart3_cts_n_pa1 {
>> -				nvidia,pins = "uart3_cts_n_pa1";
>> -				nvidia,function = "uartc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap2_fs_pa2 {
>> -				nvidia,pins = "dap2_fs_pa2";
>> -				nvidia,function = "i2s1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap2_sclk_pa3 {
>> -				nvidia,pins = "dap2_sclk_pa3";
>> -				nvidia,function = "i2s1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap2_din_pa4 {
>> -				nvidia,pins = "dap2_din_pa4";
>> -				nvidia,function = "i2s1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap2_dout_pa5 {
>> -				nvidia,pins = "dap2_dout_pa5";
>> -				nvidia,function = "i2s1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_clk_pa6 {
>> -				nvidia,pins = "sdmmc3_clk_pa6";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc3_cmd_pa7 {
>> -				nvidia,pins = "sdmmc3_cmd_pa7";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pb0 {
>> -				nvidia,pins = "pb0";
>> -				nvidia,function = "uartd";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pb1 {
>> -				nvidia,pins = "pb1";
>> -				nvidia,function = "uartd";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_dat3_pb4 {
>> -				nvidia,pins = "sdmmc3_dat3_pb4";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_dat2_pb5 {
>> -				nvidia,pins = "sdmmc3_dat2_pb5";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_dat1_pb6 {
>> -				nvidia,pins = "sdmmc3_dat1_pb6";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_dat0_pb7 {
>> -				nvidia,pins = "sdmmc3_dat0_pb7";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			uart3_rts_n_pc0 {
>> -				nvidia,pins = "uart3_rts_n_pc0";
>> -				nvidia,function = "uartc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart2_txd_pc2 {
>> -				nvidia,pins = "uart2_txd_pc2";
>> -				nvidia,function = "irda";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart2_rxd_pc3 {
>> -				nvidia,pins = "uart2_rxd_pc3";
>> -				nvidia,function = "irda";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gen1_i2c_scl_pc4 {
>> -				nvidia,pins = "gen1_i2c_scl_pc4";
>> -				nvidia,function = "i2c1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gen1_i2c_sda_pc5 {
>> -				nvidia,pins = "gen1_i2c_sda_pc5";
>> -				nvidia,function = "i2c1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pc7 {
>> -				nvidia,pins = "pc7";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pg0 {
>> -				nvidia,pins = "pg0";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pg1 {
>> -				nvidia,pins = "pg1";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pg2 {
>> -				nvidia,pins = "pg2";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pg3 {
>> -				nvidia,pins = "pg3";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pg4 {
>> -				nvidia,pins = "pg4";
>> -				nvidia,function = "spi4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pg5 {
>> -				nvidia,pins = "pg5";
>> -				nvidia,function = "spi4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pg6 {
>> -				nvidia,pins = "pg6";
>> -				nvidia,function = "spi4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pg7 {
>> -				nvidia,pins = "pg7";
>> -				nvidia,function = "spi4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ph0 {
>> -				nvidia,pins = "ph0";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph1 {
>> -				nvidia,pins = "ph1";
>> -				nvidia,function = "pwm1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph2 {
>> -				nvidia,pins = "ph2";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph3 {
>> -				nvidia,pins = "ph3";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph4 {
>> -				nvidia,pins = "ph4";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ph5 {
>> -				nvidia,pins = "ph5";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph6 {
>> -				nvidia,pins = "ph6";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ph7 {
>> -				nvidia,pins = "ph7";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pi0 {
>> -				nvidia,pins = "pi0";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pi1 {
>> -				nvidia,pins = "pi1";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pi2 {
>> -				nvidia,pins = "pi2";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pi3 {
>> -				nvidia,pins = "pi3";
>> -				nvidia,function = "spi4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pi4 {
>> -				nvidia,pins = "pi4";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pi5 {
>> -				nvidia,pins = "pi5";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pi6 {
>> -				nvidia,pins = "pi6";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pi7 {
>> -				nvidia,pins = "pi7";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pj0 {
>> -				nvidia,pins = "pj0";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pj2 {
>> -				nvidia,pins = "pj2";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			uart2_cts_n_pj5 {
>> -				nvidia,pins = "uart2_cts_n_pj5";
>> -				nvidia,function = "uartb";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			uart2_rts_n_pj6 {
>> -				nvidia,pins = "uart2_rts_n_pj6";
>> -				nvidia,function = "uartb";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pj7 {
>> -				nvidia,pins = "pj7";
>> -				nvidia,function = "uartd";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pk0 {
>> -				nvidia,pins = "pk0";
>> -				nvidia,function = "soc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pk1 {
>> -				nvidia,pins = "pk1";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pk2 {
>> -				nvidia,pins = "pk2";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pk3 {
>> -				nvidia,pins = "pk3";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pk4 {
>> -				nvidia,pins = "pk4";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			spdif_out_pk5 {
>> -				nvidia,pins = "spdif_out_pk5";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			spdif_in_pk6 {
>> -				nvidia,pins = "spdif_in_pk6";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pk7 {
>> -				nvidia,pins = "pk7";
>> -				nvidia,function = "uartd";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap1_fs_pn0 {
>> -				nvidia,pins = "dap1_fs_pn0";
>> -				nvidia,function = "i2s0";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap1_din_pn1 {
>> -				nvidia,pins = "dap1_din_pn1";
>> -				nvidia,function = "i2s0";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap1_dout_pn2 {
>> -				nvidia,pins = "dap1_dout_pn2";
>> -				nvidia,function = "sata";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap1_sclk_pn3 {
>> -				nvidia,pins = "dap1_sclk_pn3";
>> -				nvidia,function = "i2s0";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			usb_vbus_en0_pn4 {
>> -				nvidia,pins = "usb_vbus_en0_pn4";
>> -				nvidia,function = "usb";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			usb_vbus_en1_pn5 {
>> -				nvidia,pins = "usb_vbus_en1_pn5";
>> -				nvidia,function = "usb";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			hdmi_int_pn7 {
>> -				nvidia,pins = "hdmi_int_pn7";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_data7_po0 {
>> -				nvidia,pins = "ulpi_data7_po0";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_data0_po1 {
>> -				nvidia,pins = "ulpi_data0_po1";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_data1_po2 {
>> -				nvidia,pins = "ulpi_data1_po2";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_data2_po3 {
>> -				nvidia,pins = "ulpi_data2_po3";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_data3_po4 {
>> -				nvidia,pins = "ulpi_data3_po4";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_data4_po5 {
>> -				nvidia,pins = "ulpi_data4_po5";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_data5_po6 {
>> -				nvidia,pins = "ulpi_data5_po6";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_data6_po7 {
>> -				nvidia,pins = "ulpi_data6_po7";
>> -				nvidia,function = "ulpi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap3_fs_pp0 {
>> -				nvidia,pins = "dap3_fs_pp0";
>> -				nvidia,function = "i2s2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap3_din_pp1 {
>> -				nvidia,pins = "dap3_din_pp1";
>> -				nvidia,function = "i2s2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap3_dout_pp2 {
>> -				nvidia,pins = "dap3_dout_pp2";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap3_sclk_pp3 {
>> -				nvidia,pins = "dap3_sclk_pp3";
>> -				nvidia,function = "rsvd3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap4_fs_pp4 {
>> -				nvidia,pins = "dap4_fs_pp4";
>> -				nvidia,function = "i2s3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap4_din_pp5 {
>> -				nvidia,pins = "dap4_din_pp5";
>> -				nvidia,function = "i2s3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap4_dout_pp6 {
>> -				nvidia,pins = "dap4_dout_pp6";
>> -				nvidia,function = "i2s3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap4_sclk_pp7 {
>> -				nvidia,pins = "dap4_sclk_pp7";
>> -				nvidia,function = "i2s3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col0_pq0 {
>> -				nvidia,pins = "kb_col0_pq0";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col1_pq1 {
>> -				nvidia,pins = "kb_col1_pq1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col2_pq2 {
>> -				nvidia,pins = "kb_col2_pq2";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col3_pq3 {
>> -				nvidia,pins = "kb_col3_pq3";
>> -				nvidia,function = "kbc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_col4_pq4 {
>> -				nvidia,pins = "kb_col4_pq4";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col5_pq5 {
>> -				nvidia,pins = "kb_col5_pq5";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col6_pq6 {
>> -				nvidia,pins = "kb_col6_pq6";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col7_pq7 {
>> -				nvidia,pins = "kb_col7_pq7";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row0_pr0 {
>> -				nvidia,pins = "kb_row0_pr0";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row1_pr1 {
>> -				nvidia,pins = "kb_row1_pr1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row2_pr2 {
>> -				nvidia,pins = "kb_row2_pr2";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row3_pr3 {
>> -				nvidia,pins = "kb_row3_pr3";
>> -				nvidia,function = "sys";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row4_pr4 {
>> -				nvidia,pins = "kb_row4_pr4";
>> -				nvidia,function = "rsvd3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row5_pr5 {
>> -				nvidia,pins = "kb_row5_pr5";
>> -				nvidia,function = "rsvd3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row6_pr6 {
>> -				nvidia,pins = "kb_row6_pr6";
>> -				nvidia,function = "displaya_alt";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row7_pr7 {
>> -				nvidia,pins = "kb_row7_pr7";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row8_ps0 {
>> -				nvidia,pins = "kb_row8_ps0";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row9_ps1 {
>> -				nvidia,pins = "kb_row9_ps1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row10_ps2 {
>> -				nvidia,pins = "kb_row10_ps2";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row11_ps3 {
>> -				nvidia,pins = "kb_row11_ps3";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row12_ps4 {
>> -				nvidia,pins = "kb_row12_ps4";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row13_ps5 {
>> -				nvidia,pins = "kb_row13_ps5";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row14_ps6 {
>> -				nvidia,pins = "kb_row14_ps6";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row15_ps7 {
>> -				nvidia,pins = "kb_row15_ps7";
>> -				nvidia,function = "soc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row16_pt0 {
>> -				nvidia,pins = "kb_row16_pt0";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row17_pt1 {
>> -				nvidia,pins = "kb_row17_pt1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			gen2_i2c_scl_pt5 {
>> -				nvidia,pins = "gen2_i2c_scl_pt5";
>> -				nvidia,function = "i2c2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gen2_i2c_sda_pt6 {
>> -				nvidia,pins = "gen2_i2c_sda_pt6";
>> -				nvidia,function = "i2c2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_cmd_pt7 {
>> -				nvidia,pins = "sdmmc4_cmd_pt7";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pu0 {
>> -				nvidia,pins = "pu0";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pu1 {
>> -				nvidia,pins = "pu1";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pu2 {
>> -				nvidia,pins = "pu2";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pu3 {
>> -				nvidia,pins = "pu3";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pu4 {
>> -				nvidia,pins = "pu4";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pu5 {
>> -				nvidia,pins = "pu5";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pu6 {
>> -				nvidia,pins = "pu6";
>> -				nvidia,function = "rsvd3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pv0 {
>> -				nvidia,pins = "pv0";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pv1 {
>> -				nvidia,pins = "pv1";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_cd_n_pv2 {
>> -				nvidia,pins = "sdmmc3_cd_n_pv2";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_wp_n_pv3 {
>> -				nvidia,pins = "sdmmc1_wp_n_pv3";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ddc_scl_pv4 {
>> -				nvidia,pins = "ddc_scl_pv4";
>> -				nvidia,function = "i2c4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ddc_sda_pv5 {
>> -				nvidia,pins = "ddc_sda_pv5";
>> -				nvidia,function = "i2c4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			gpio_w2_aud_pw2 {
>> -				nvidia,pins = "gpio_w2_aud_pw2";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gpio_w3_aud_pw3 {
>> -				nvidia,pins = "gpio_w3_aud_pw3";
>> -				nvidia,function = "spi6";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap_mclk1_pw4 {
>> -				nvidia,pins = "dap_mclk1_pw4";
>> -				nvidia,function = "extperiph1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			clk2_out_pw5 {
>> -				nvidia,pins = "clk2_out_pw5";
>> -				nvidia,function = "extperiph2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart3_txd_pw6 {
>> -				nvidia,pins = "uart3_txd_pw6";
>> -				nvidia,function = "uartc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart3_rxd_pw7 {
>> -				nvidia,pins = "uart3_rxd_pw7";
>> -				nvidia,function = "uartc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dvfs_pwm_px0 {
>> -				nvidia,pins = "dvfs_pwm_px0";
>> -				nvidia,function = "cldvfs";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			gpio_x1_aud_px1 {
>> -				nvidia,pins = "gpio_x1_aud_px1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dvfs_clk_px2 {
>> -				nvidia,pins = "dvfs_clk_px2";
>> -				nvidia,function = "cldvfs";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			gpio_x3_aud_px3 {
>> -				nvidia,pins = "gpio_x3_aud_px3";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gpio_x4_aud_px4 {
>> -				nvidia,pins = "gpio_x4_aud_px4";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			gpio_x5_aud_px5 {
>> -				nvidia,pins = "gpio_x5_aud_px5";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gpio_x6_aud_px6 {
>> -				nvidia,pins = "gpio_x6_aud_px6";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gpio_x7_aud_px7 {
>> -				nvidia,pins = "gpio_x7_aud_px7";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_clk_py0 {
>> -				nvidia,pins = "ulpi_clk_py0";
>> -				nvidia,function = "spi1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_dir_py1 {
>> -				nvidia,pins = "ulpi_dir_py1";
>> -				nvidia,function = "spi1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ulpi_nxt_py2 {
>> -				nvidia,pins = "ulpi_nxt_py2";
>> -				nvidia,function = "spi1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_stp_py3 {
>> -				nvidia,pins = "ulpi_stp_py3";
>> -				nvidia,function = "spi1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc1_dat3_py4 {
>> -				nvidia,pins = "sdmmc1_dat3_py4";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_dat2_py5 {
>> -				nvidia,pins = "sdmmc1_dat2_py5";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_dat1_py6 {
>> -				nvidia,pins = "sdmmc1_dat1_py6";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_dat0_py7 {
>> -				nvidia,pins = "sdmmc1_dat0_py7";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_clk_pz0 {
>> -				nvidia,pins = "sdmmc1_clk_pz0";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_cmd_pz1 {
>> -				nvidia,pins = "sdmmc1_cmd_pz1";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pwr_i2c_scl_pz6 {
>> -				nvidia,pins = "pwr_i2c_scl_pz6";
>> -				nvidia,function = "i2cpwr";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pwr_i2c_sda_pz7 {
>> -				nvidia,pins = "pwr_i2c_sda_pz7";
>> -				nvidia,function = "i2cpwr";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat0_paa0 {
>> -				nvidia,pins = "sdmmc4_dat0_paa0";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat1_paa1 {
>> -				nvidia,pins = "sdmmc4_dat1_paa1";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat2_paa2 {
>> -				nvidia,pins = "sdmmc4_dat2_paa2";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat3_paa3 {
>> -				nvidia,pins = "sdmmc4_dat3_paa3";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat4_paa4 {
>> -				nvidia,pins = "sdmmc4_dat4_paa4";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat5_paa5 {
>> -				nvidia,pins = "sdmmc4_dat5_paa5";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat6_paa6 {
>> -				nvidia,pins = "sdmmc4_dat6_paa6";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_dat7_paa7 {
>> -				nvidia,pins = "sdmmc4_dat7_paa7";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pbb0 {
>> -				nvidia,pins = "pbb0";
>> -				nvidia,function = "vimclk2_alt";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			cam_i2c_scl_pbb1 {
>> -				nvidia,pins = "cam_i2c_scl_pbb1";
>> -				nvidia,function = "i2c3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			cam_i2c_sda_pbb2 {
>> -				nvidia,pins = "cam_i2c_sda_pbb2";
>> -				nvidia,function = "i2c3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pbb3 {
>> -				nvidia,pins = "pbb3";
>> -				nvidia,function = "vgp3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pbb4 {
>> -				nvidia,pins = "pbb4";
>> -				nvidia,function = "vgp4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pbb5 {
>> -				nvidia,pins = "pbb5";
>> -				nvidia,function = "rsvd3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pbb6 {
>> -				nvidia,pins = "pbb6";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pbb7 {
>> -				nvidia,pins = "pbb7";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			cam_mclk_pcc0 {
>> -				nvidia,pins = "cam_mclk_pcc0";
>> -				nvidia,function = "vi_alt3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pcc1 {
>> -				nvidia,pins = "pcc1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pcc2 {
>> -				nvidia,pins = "pcc2";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc4_clk_pcc4 {
>> -				nvidia,pins = "sdmmc4_clk_pcc4";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			clk2_req_pcc5 {
>> -				nvidia,pins = "clk2_req_pcc5";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			clk3_out_pee0 {
>> -				nvidia,pins = "clk3_out_pee0";
>> -				nvidia,function = "extperiph3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			clk3_req_pee1 {
>> -				nvidia,pins = "clk3_req_pee1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap_mclk1_req_pee2 {
>> -				nvidia,pins = "dap_mclk1_req_pee2";
>> -				nvidia,function = "sata";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			hdmi_cec_pee3 {
>> -				nvidia,pins = "hdmi_cec_pee3";
>> -				nvidia,function = "cec";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_clk_lb_out_pee4 {
>> -				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc3_clk_lb_in_pee5 {
>> -				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dp_hpd_pff0 {
>> -				nvidia,pins = "dp_hpd_pff0";
>> -				nvidia,function = "dp";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			usb_vbus_en2_pff1 {
>> -				nvidia,pins = "usb_vbus_en2_pff1";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pff2 {
>> -				nvidia,pins = "pff2";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			core_pwr_req {
>> -				nvidia,pins = "core_pwr_req";
>> -				nvidia,function = "pwron";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			cpu_pwr_req {
>> -				nvidia,pins = "cpu_pwr_req";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pwr_int_n {
>> -				nvidia,pins = "pwr_int_n";
>> -				nvidia,function = "pmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			reset_out_n {
>> -				nvidia,pins = "reset_out_n";
>> -				nvidia,function = "reset_out_n";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			owr {
>> -				nvidia,pins = "owr";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			clk_32k_in {
>> -				nvidia,pins = "clk_32k_in";
>> -				nvidia,function = "rsvd2";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			jtag_rtck {
>> -				nvidia,pins = "jtag_rtck";
>> -				nvidia,function = "rtck";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -		};
>> -	};
>> -
>>   	/* DB9 serial port */
>>   	serial@0,70006300 {
>>   		status = "okay";
>> diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
>> index f1a5bac43c55..c9ecad664fbf 100644
>> --- a/arch/arm/boot/dts/tegra124-venice2.dts
>> +++ b/arch/arm/boot/dts/tegra124-venice2.dts
>> @@ -42,547 +42,6 @@
>>   		};
>>   	};
>>
>> -	pinmux: pinmux@0,70000868 {
>> -		pinctrl-names = "default";
>> -		pinctrl-0 = <&pinmux_default>;
>> -
>> -		pinmux_default: common {
>> -			dap_mclk1_pw4 {
>> -				nvidia,pins = "dap_mclk1_pw4";
>> -				nvidia,function = "extperiph1";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap1_din_pn1 {
>> -				nvidia,pins = "dap1_din_pn1";
>> -				nvidia,function = "i2s0";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap1_dout_pn2 {
>> -				nvidia,pins = "dap1_dout_pn2",
>> -					      "dap1_fs_pn0",
>> -					      "dap1_sclk_pn3";
>> -				nvidia,function = "i2s0";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap2_din_pa4 {
>> -				nvidia,pins = "dap2_din_pa4";
>> -				nvidia,function = "i2s1";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap2_dout_pa5 {
>> -				nvidia,pins = "dap2_dout_pa5",
>> -					      "dap2_fs_pa2",
>> -					      "dap2_sclk_pa3";
>> -				nvidia,function = "i2s1";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dvfs_pwm_px0 {
>> -				nvidia,pins = "dvfs_pwm_px0",
>> -					      "dvfs_clk_px2";
>> -				nvidia,function = "cldvfs";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_clk_py0 {
>> -				nvidia,pins = "ulpi_clk_py0",
>> -					      "ulpi_nxt_py2",
>> -					      "ulpi_stp_py3";
>> -				nvidia,function = "spi1";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ulpi_dir_py1 {
>> -				nvidia,pins = "ulpi_dir_py1";
>> -				nvidia,function = "spi1";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			cam_i2c_scl_pbb1 {
>> -				nvidia,pins = "cam_i2c_scl_pbb1",
>> -					      "cam_i2c_sda_pbb2";
>> -				nvidia,function = "i2c3";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gen2_i2c_scl_pt5 {
>> -				nvidia,pins = "gen2_i2c_scl_pt5",
>> -					      "gen2_i2c_sda_pt6";
>> -				nvidia,function = "i2c2";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pg4 {
>> -				nvidia,pins = "pg4",
>> -					      "pg5",
>> -					      "pg6",
>> -					      "pi3";
>> -				nvidia,function = "spi4";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pg7 {
>> -				nvidia,pins = "pg7";
>> -				nvidia,function = "spi4";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph1 {
>> -				nvidia,pins = "ph1";
>> -				nvidia,function = "pwm1";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pk0 {
>> -				nvidia,pins = "pk0",
>> -					      "kb_row15_ps7",
>> -					      "clk_32k_out_pa0";
>> -				nvidia,function = "soc";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sdmmc1_clk_pz0 {
>> -				nvidia,pins = "sdmmc1_clk_pz0";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc1_cmd_pz1 {
>> -				nvidia,pins = "sdmmc1_cmd_pz1",
>> -					      "sdmmc1_dat0_py7",
>> -					      "sdmmc1_dat1_py6",
>> -					      "sdmmc1_dat2_py5",
>> -					      "sdmmc1_dat3_py4";
>> -				nvidia,function = "sdmmc1";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc3_clk_pa6 {
>> -				nvidia,pins = "sdmmc3_clk_pa6";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc3_cmd_pa7 {
>> -				nvidia,pins = "sdmmc3_cmd_pa7",
>> -					      "sdmmc3_dat0_pb7",
>> -					      "sdmmc3_dat1_pb6",
>> -					      "sdmmc3_dat2_pb5",
>> -					      "sdmmc3_dat3_pb4",
>> -					      "sdmmc3_clk_lb_out_pee4",
>> -					      "sdmmc3_clk_lb_in_pee5";
>> -				nvidia,function = "sdmmc3";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc4_clk_pcc4 {
>> -				nvidia,pins = "sdmmc4_clk_pcc4";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			sdmmc4_cmd_pt7 {
>> -				nvidia,pins = "sdmmc4_cmd_pt7",
>> -					      "sdmmc4_dat0_paa0",
>> -					      "sdmmc4_dat1_paa1",
>> -					      "sdmmc4_dat2_paa2",
>> -					      "sdmmc4_dat3_paa3",
>> -					      "sdmmc4_dat4_paa4",
>> -					      "sdmmc4_dat5_paa5",
>> -					      "sdmmc4_dat6_paa6",
>> -					      "sdmmc4_dat7_paa7";
>> -				nvidia,function = "sdmmc4";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pwr_i2c_scl_pz6 {
>> -				nvidia,pins = "pwr_i2c_scl_pz6",
>> -					      "pwr_i2c_sda_pz7";
>> -				nvidia,function = "i2cpwr";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			jtag_rtck {
>> -				nvidia,pins = "jtag_rtck";
>> -				nvidia,function = "rtck";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			clk_32k_in {
>> -				nvidia,pins = "clk_32k_in";
>> -				nvidia,function = "clk";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			core_pwr_req {
>> -				nvidia,pins = "core_pwr_req";
>> -				nvidia,function = "pwron";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			cpu_pwr_req {
>> -				nvidia,pins = "cpu_pwr_req";
>> -				nvidia,function = "cpu";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pwr_int_n {
>> -				nvidia,pins = "pwr_int_n";
>> -				nvidia,function = "pmi";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			reset_out_n {
>> -				nvidia,pins = "reset_out_n";
>> -				nvidia,function = "reset_out_n";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			clk3_out_pee0 {
>> -				nvidia,pins = "clk3_out_pee0";
>> -				nvidia,function = "extperiph3";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			dap4_din_pp5 {
>> -				nvidia,pins = "dap4_din_pp5";
>> -				nvidia,function = "i2s3";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			dap4_dout_pp6 {
>> -				nvidia,pins = "dap4_dout_pp6",
>> -					      "dap4_fs_pp4",
>> -					      "dap4_sclk_pp7";
>> -				nvidia,function = "i2s3";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			gen1_i2c_sda_pc5 {
>> -				nvidia,pins = "gen1_i2c_sda_pc5",
>> -					      "gen1_i2c_scl_pc4";
>> -				nvidia,function = "i2c1";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			uart2_cts_n_pj5 {
>> -				nvidia,pins = "uart2_cts_n_pj5";
>> -				nvidia,function = "uartb";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart2_rts_n_pj6 {
>> -				nvidia,pins = "uart2_rts_n_pj6";
>> -				nvidia,function = "uartb";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart2_rxd_pc3 {
>> -				nvidia,pins = "uart2_rxd_pc3";
>> -				nvidia,function = "irda";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart2_txd_pc2 {
>> -				nvidia,pins = "uart2_txd_pc2";
>> -				nvidia,function = "irda";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart3_cts_n_pa1 {
>> -				nvidia,pins = "uart3_cts_n_pa1",
>> -					      "uart3_rxd_pw7";
>> -				nvidia,function = "uartc";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			uart3_rts_n_pc0 {
>> -				nvidia,pins = "uart3_rts_n_pc0",
>> -					      "uart3_txd_pw6";
>> -				nvidia,function = "uartc";
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			hdmi_cec_pee3 {
>> -				nvidia,pins = "hdmi_cec_pee3";
>> -				nvidia,function = "cec";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			hdmi_int_pn7 {
>> -				nvidia,pins = "hdmi_int_pn7";
>> -				nvidia,function = "rsvd1";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ddc_scl_pv4 {
>> -				nvidia,pins = "ddc_scl_pv4",
>> -					      "ddc_sda_pv5";
>> -				nvidia,function = "i2c4";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			pj7 {
>> -				nvidia,pins = "pj7",
>> -					      "pk7";
>> -				nvidia,function = "uartd";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			pb0 {
>> -				nvidia,pins = "pb0",
>> -					      "pb1";
>> -				nvidia,function = "uartd";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ph0 {
>> -				nvidia,pins = "ph0";
>> -				nvidia,function = "pwm0";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row10_ps2 {
>> -				nvidia,pins = "kb_row10_ps2";
>> -				nvidia,function = "uarta";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_row9_ps1 {
>> -				nvidia,pins = "kb_row9_ps1";
>> -				nvidia,function = "uarta";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			kb_row6_pr6 {
>> -				nvidia,pins = "kb_row6_pr6";
>> -				nvidia,function = "displaya_alt";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			usb_vbus_en0_pn4 {
>> -				nvidia,pins = "usb_vbus_en0_pn4",
>> -					      "usb_vbus_en1_pn5";
>> -				nvidia,function = "usb";
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,lock = <TEGRA_PIN_DISABLE>;
>> -				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			drive_sdio1 {
>> -				nvidia,pins = "drive_sdio1";
>> -				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
>> -				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull-down-strength = <32>;
>> -				nvidia,pull-up-strength = <42>;
>> -				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
>> -				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
>> -			};
>> -			drive_sdio3 {
>> -				nvidia,pins = "drive_sdio3";
>> -				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
>> -				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
>> -				nvidia,pull-down-strength = <20>;
>> -				nvidia,pull-up-strength = <36>;
>> -				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
>> -				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
>> -			};
>> -			drive_gma {
>> -				nvidia,pins = "drive_gma";
>> -				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
>> -				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
>> -				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
>> -				nvidia,pull-down-strength = <1>;
>> -				nvidia,pull-up-strength = <2>;
>> -				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
>> -				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
>> -				nvidia,drive-type = <1>;
>> -			};
>> -			als_irq_l {
>> -				nvidia,pins = "gpio_x3_aud_px3";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			codec_irq_l {
>> -				nvidia,pins = "ph4";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			lcd_bl_en {
>> -				nvidia,pins = "ph2";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			touch_irq_l {
>> -				nvidia,pins = "gpio_w3_aud_pw3";
>> -				nvidia,function = "spi6";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			tpm_davint_l {
>> -				nvidia,pins = "ph6";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ts_irq_l {
>> -				nvidia,pins = "pk2";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			ts_reset_l {
>> -				nvidia,pins = "pk4";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ts_shdn_l {
>> -				nvidia,pins = "pk1";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ph7 {
>> -				nvidia,pins = "ph7";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			kb_col0_ap {
>> -				nvidia,pins = "kb_col0_pq0";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			lid_open {
>> -				nvidia,pins = "kb_row4_pr4";
>> -				nvidia,function = "rsvd3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			en_vdd_sd {
>> -				nvidia,pins = "kb_row0_pr0";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			ac_ok {
>> -				nvidia,pins = "pj0";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_UP>;
>> -				nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			sensor_irq_l {
>> -				nvidia,pins = "pi6";
>> -				nvidia,function = "gmi";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			wifi_en {
>> -				nvidia,pins = "gpio_x7_aud_px7";
>> -				nvidia,function = "rsvd4";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
>> -			};
>> -			wifi_rst_l {
>> -				nvidia,pins = "clk2_req_pcc5";
>> -				nvidia,function = "dap";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -			hp_det_l {
>> -				nvidia,pins = "ulpi_data1_po2";
>> -				nvidia,function = "spi3";
>> -				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
>> -				nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> -				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
>> -			};
>> -		};
>> -	};
>> -
>>   	serial@0,70006000 {
>>   		status = "okay";
>>   	};
>