[pinmux scripts PATCH 1/5] Remove stale FIXME in board-to-uboot.py

[pinmux scripts PATCH 1/5] Remove stale FIXME in board-to-uboot.py

[Stephen Warren]

From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The FIXME has already been fixed!

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
This series mainly adds support for configuring the MIPI pad control
registers, along with a few fixes/cleanups first. I'll enhance the
Jetson TK1 board file to actually include MIPI pad control settings
as soon as I've cleared up one other change in the latest spreadsheet.
---
 board-to-uboot.py | 1 -
 1 file changed, 1 deletion(-)

diff --git a/board-to-uboot.py b/board-to-uboot.py
index f47f6f6c47b3..f337b6371955 100755
--- a/board-to-uboot.py
+++ b/board-to-uboot.py
@@ -41,7 +41,6 @@ board = tegra_pmx_board_parser.load_board(args.board)
 
 copyright_year = datetime.date.today().year
 
-# FIXME: Need to make rcv_sel parameter to PINCFG() macro below optional
 print('''\
 /*
  * Copyright (c) %(copyright_year)d, NVIDIA CORPORATION. All rights reserved.
-- 
1.9.1

[pinmux scripts PATCH 2/5] Fix some TAB alignment issues

[Stephen Warren]

From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

append_aligned_tabs_indent_with_tabs() was converting TABs to spaces to
simplify calculation of line length, assuming the only TABs were at the
beginning of the line, and hence were all exactly 8 characters wide. In
some scenarios, TABs were also embedded within the line, which caused
incorrect calculations. Solve this by explicitly evaluating TAB widths
character by character, rather than taking shortcuts.

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 board-to-uboot.py               |  2 +-
 soc-to-kernel-pinctrl-driver.py |  4 ++--
 tegra_pmx_utils.py              | 26 ++++++++++++++++++--------
 3 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/board-to-uboot.py b/board-to-uboot.py
index f337b6371955..8c5f11f076f7 100755
--- a/board-to-uboot.py
+++ b/board-to-uboot.py
@@ -117,7 +117,7 @@ if board.soc.soc_pins_have_ior:
 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,
 '''
 
-s = append_aligned_tabs_indent_with_tabs(s)
+s = append_aligned_tabs_indent_with_tabs(s, 0)
 print(s)
 
 print('''\
diff --git a/soc-to-kernel-pinctrl-driver.py b/soc-to-kernel-pinctrl-driver.py
index f7743e0d4097..46547b194d33 100755
--- a/soc-to-kernel-pinctrl-driver.py
+++ b/soc-to-kernel-pinctrl-driver.py
@@ -302,7 +302,7 @@ else:
 		.drv_reg = -1,
 '''
 
-s = append_aligned_tabs_indent_with_tabs(s)
+s = append_aligned_tabs_indent_with_tabs(s, 72)
 print(s)
 
 print('''\
@@ -372,7 +372,7 @@ s += '''\
 		.drvtype_bit = %(drvtype_bit_val)s
 ''' % globals()
 
-s = append_aligned_tabs_indent_with_tabs(s)
+s = append_aligned_tabs_indent_with_tabs(s, 72)
 print(s)
 
 print('''\
diff --git a/tegra_pmx_utils.py b/tegra_pmx_utils.py
index ece3c1606dc0..2551282963a9 100644
--- a/tegra_pmx_utils.py
+++ b/tegra_pmx_utils.py
@@ -74,21 +74,31 @@ def gen_wrapped_c_macro_header(macro, params):
         s += '\n'
     return s
 
-def append_aligned_tabs_indent_with_tabs(s):
+def len_evaluating_tabs(s):
+    l = 0
+    for c in s:
+        if c == '\t':
+            l = (l + 8) & ~7
+        else:
+            l += 1
+    return l
+
+def append_aligned_tabs_indent_with_tabs(s, min_slashpos):
     lines = s.split('\n')
     if lines[-1].strip() == '':
         del lines[-1]
+    # This is intended to translate leading spaces to TABs, so that callers
+    # don't have to work out the right number of TABs to use. It also would
+    # affect intra-line space, but there is none in practice so far.
     for i, l in enumerate(lines):
-        lines[i] = l.replace('\t', '        ')
+        lines[i] = l.replace('        ', '\t')
     max_len = 0
     for l in lines:
-        max_len = max(max_len, len(l))
-    tabpos = (max_len + 7) // 8
+        max_len = max(max_len, len_evaluating_tabs(l))
+    max_len = max(max_len, min_slashpos)
+    tabpos = (max_len + 7) & ~7
     for i, l in enumerate(lines):
-        remaining = 72 - len(l)
-        lines[i] += gen_tab_padding_to(len(l) + 1, 73) + '\\'
-    for i, l in enumerate(lines):
-        lines[i] = l.replace('        ', '\t')
+        lines[i] += gen_tab_padding_to(len_evaluating_tabs(l) + 1, tabpos + 1) + '\\'
     return '\n'.join(lines)
 
 def yn_to_boolean(s):
-- 
1.9.1

[pinmux scripts PATCH 3/5] csv-to-board: handle missing package columns

[Stephen Warren]

From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Some board spreadsheets may have irrelevant package columns removed,
leaving only the package column that the specific board uses. Update
csv-to-board to handle missing package columns.

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 csv-to-board.py | 23 ++++++++++++++++-------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/csv-to-board.py b/csv-to-board.py
index 2860c029b9f3..b2d1c46ec302 100755
--- a/csv-to-board.py
+++ b/csv-to-board.py
@@ -190,18 +190,27 @@ with open(board_conf['filename'], newline='') as fh:
                 try:
                     cols[colid] = row.index(coltext)
                 except:
-                    if board_conf['soc'] != 'tegra124':
-                        raise
-                    if colid != COL_RCV_SEL:
-                        print('ERROR: Header column "%s" not found' % coltext, file=sys.stderr)
-                        sys.exit(1)
+                    if colid in (COL_BALL_MID, COL_BALL_DSC):
+                        pass
+                    else:
+                        if board_conf['soc'] != 'tegra124':
+                            raise
+                        if colid != COL_RCV_SEL:
+                            print('ERROR: Header column "%s" not found' % coltext, file=sys.stderr)
+                            sys.exit(1)
                     cols[colid] = None
             found_header = True
             continue
 
         ball_name = row[cols[COL_BALL_NAME]].lower()
-        ball_mid = row[cols[COL_BALL_MID]]
-        ball_dsc = row[cols[COL_BALL_DSC]]
+        if cols[COL_BALL_MID]:
+            ball_mid = row[cols[COL_BALL_MID]]
+        else:
+            ball_mid = None
+        if cols[COL_BALL_DSC]:
+            ball_dsc = row[cols[COL_BALL_DSC]]
+        else:
+            ball_dsc = None
 
         # Section title row
         if not ball_mid and not ball_dsc:
-- 
1.9.1

[pinmux scripts PATCH 4/5] Add support for MIPI pad ctrl groups in U-Boot driver generator

[Stephen Warren]

From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 configs/tegra124.soc    |  1 +
 soc-to-uboot-driver.py  | 65 +++++++++++++++++++++++++++++++++++++++++++++++++
 tegra_pmx_soc_parser.py |  9 ++++++-
 3 files changed, 74 insertions(+), 1 deletion(-)

diff --git a/configs/tegra124.soc b/configs/tegra124.soc
index daf437419d6c..aaeaab85caf7 100644
--- a/configs/tegra124.soc
+++ b/configs/tegra124.soc
@@ -23,6 +23,7 @@ soc_pins_have_od = True
 soc_pins_have_rcv_sel = True
 soc_pins_have_schmitt = False
 soc_drv_reg_base = 0x868
+soc_mipipadctrl_reg_base = 0x820
 soc_einput_b = 5
 soc_odrain_b = 6
 
diff --git a/soc-to-uboot-driver.py b/soc-to-uboot-driver.py
index 8469af94dec2..50e0dc1b5baa 100755
--- a/soc-to-uboot-driver.py
+++ b/soc-to-uboot-driver.py
@@ -85,6 +85,28 @@ for group in soc.drive_groups_by_reg():
 print('''\
 	PMUX_DRVGRP_COUNT,
 };
+''', file=f, end='')
+
+if len(soc.mipi_pad_ctrl_groups_by_reg()):
+    print('''\
+
+enum pmux_mipipadctrlgrp {
+''', file=f, end='')
+
+    last_reg = soc.soc_mipipadctrl_reg_base - 4
+    for group in soc.mipi_pad_ctrl_groups_by_reg():
+        if group.reg != last_reg + 4:
+            eqs = ' = (0x%x / 4)' % (group.reg - soc.soc_mipipadctrl_reg_base)
+        else:
+            eqs = ''
+        print('\tPMUX_MIPIPADCTRLGRP_%s%s,' % (group.name.upper(), eqs), file=f)
+
+    print('''\
+	PMUX_MIPIPADCTRLGRP_COUNT,
+};
+''', file=f, end='')
+
+print('''\
 
 enum pmux_func {
 	PMUX_FUNC_DEFAULT,
@@ -107,11 +129,17 @@ print('''\
 ''' % tuple(soc.soc_rsvd_base + i for i in range(4)), file=f, end='')
 
 print('#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x%x' % soc.soc_drv_reg_base, file=f)
+if len(soc.mipi_pad_ctrl_groups_by_reg()):
+    print('#define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x%x' % soc.soc_mipipadctrl_reg_base, file=f)
+
 if soc.soc_has_io_clamping:
     print('#define TEGRA_PMX_SOC_HAS_IO_CLAMPING', file=f)
 
 print('#define TEGRA_PMX_SOC_HAS_DRVGRPS', file=f)
 
+if len(soc.mipi_pad_ctrl_groups_by_reg()):
+    print('#define TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS', file=f)
+
 if soc.soc_drvgroups_have_lpmd:
     print('#define TEGRA_PMX_GRPS_HAVE_LPMD', file=f)
 
@@ -193,4 +221,41 @@ print('''\
 const struct pmux_pingrp_desc *tegra_soc_pingroups = %s_pingroups;
 ''' % soc.name, file=f, end='')
 
+if len(soc.mipi_pad_ctrl_groups_by_reg()):
+    print('''\
+
+#define MIPIPADCTRL_GRP(grp, f0, f1)	\\
+	{				\\
+		.funcs = {		\\
+			PMUX_FUNC_##f0,	\\
+			PMUX_FUNC_##f1,	\\
+		},			\\
+	}
+
+#define MIPIPADCTRL_RESERVED {}
+
+static const struct pmux_mipipadctrlgrp_desc %s_mipipadctrl_groups[] = {
+''' % soc.name, file=f, end='')
+
+    headings = ('pin', 'f0', 'f1')
+    rows = []
+    last_reg = 0
+    for grp in soc.mipi_pad_ctrl_groups_by_reg():
+        if grp.reg != last_reg + 4:
+            if last_reg:
+                for i in range(((grp.reg - last_reg) // 4) - 1):
+                    rows.append('\tMIPIPACTRL_RESERVED,',)
+            rows.append('\t/* Offset 0x%x */' % grp.reg,)
+        last_reg = grp.reg
+        row = (grp.name.upper(),)
+        for i in range(2):
+            row += (grp.funcs[i].upper(),)
+        rows.append(row)
+    dump_c_table(headings, 'MIPIPADCTRL_GRP', rows, file=f)
+
+    print('''\
+};
+const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = %s_mipipadctrl_groups;
+''' % soc.name, file=f, end='')
+
 f.close()
diff --git a/tegra_pmx_soc_parser.py b/tegra_pmx_soc_parser.py
index a07c303d7df9..2b5d17001e58 100644
--- a/tegra_pmx_soc_parser.py
+++ b/tegra_pmx_soc_parser.py
@@ -126,6 +126,7 @@ class MipiPadCtrlGroup(ReprDictObj):
             self.__setattr__(field, data[i])
         self.gpios_pins = gpios_pins
         self.fullname = 'mipi_pad_ctrl_' + self.name
+        self.funcs = (self.f0, self.f1)
 
 class Function(ReprDictObj):
     def __init__(self, name):
@@ -158,6 +159,7 @@ class Soc(TopLevelParsedObj):
             ('soc_pins_have_rcv_sel', None),
             ('soc_pins_have_schmitt', None),
             ('soc_drv_reg_base', None),
+            ('soc_mipipadctrl_reg_base', 0),
             ('soc_einput_b', None),
             ('soc_odrain_b', None),
         )
@@ -228,7 +230,6 @@ class Soc(TopLevelParsedObj):
             for func in (group.f0, group.f1):
                 if func not in functions:
                     functions[func] = Function(func)
-                functions[func]._add_pin(pin)
         self._functions = functions.values()
         self._functions_by_alpha = sorted(self._functions, key=lambda f: f.name)
 
@@ -288,6 +289,12 @@ class Soc(TopLevelParsedObj):
     def mipi_pad_ctrl_groups_by_alpha(self):
         return self._mipi_pad_ctrl_groups_by_alpha
 
+    def mipi_pad_ctrl_group_by_name(self, name):
+        for mipi_pad_ctrl in self._mipi_pad_ctrl_groups:
+            if name == mipi_pad_ctrl.name:
+                return mipi_pad_ctrl
+        return None
+
     def functions(self):
         return self._functions
 
-- 
1.9.1

[pinmux scripts PATCH 5/5] Support for MIPI pad ctrl groups in *.board

[Stephen Warren]

From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Update csv-to-board.py to extract, and board-to-*.py to emit,
configuration for MIPI pad ctrl groups.

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 board-to-kernel-dt.py     |  6 ++++++
 board-to-uboot.py         | 29 +++++++++++++++++++++++++++++
 csv-to-board.py           | 30 +++++++++++++++++++++++-------
 tegra_pmx_board_parser.py | 20 ++++++++++++++++++++
 4 files changed, 78 insertions(+), 7 deletions(-)

diff --git a/board-to-kernel-dt.py b/board-to-kernel-dt.py
index 394b4ac6ce9c..273f74125fa6 100755
--- a/board-to-kernel-dt.py
+++ b/board-to-kernel-dt.py
@@ -64,6 +64,12 @@ for pincfg in board.pincfgs_by_num():
 
 # FIXME: Handle drive groups
 
+for cfg in board.mipipadctrlcfgs_by_num():
+    print('			' + cfg.name + ' {')
+    print('				nvidia,pins = "mipi_pad_ctrl_' + cfg.name + '";')
+    print('				nvidia,function = "' + cfg.mux + '";')
+    print('			};')
+
 print('		};')
 
 board.warn_about_unconfigured_pins()
diff --git a/board-to-uboot.py b/board-to-uboot.py
index 8c5f11f076f7..7b20f23949bc 100755
--- a/board-to-uboot.py
+++ b/board-to-uboot.py
@@ -205,6 +205,35 @@ static const struct pmux_drvgrp_config %s_drvgrps[] = {
 print('''\
 };
 
+''', end='')
+
+if len(board.mipipadctrlcfgs_by_num()):
+    print('''\
+#define MIPIPADCTRLCFG(_grp, _mux) \\
+	{							\\
+		.grp		= PMUX_MIPIPADCTRLGRP_##_grp,	\\
+		.func		= PMUX_FUNC_##_mux,		\\
+	}
+
+static const struct pmux_mipipadctrlgrp_config %s_mipipadctrlgrps[] = {
+''' % board.varname, end='')
+
+    mipipadctrl_table = []
+    for cfg in board.mipipadctrlcfgs_by_num():
+        row = (
+            cfg.name.upper(),
+            mapper_mux(cfg.mux),
+        )
+        mipipadctrl_table.append(row)
+    headings = ('grp', 'mux')
+    dump_c_table(headings, 'MIPIPADCTRLCFG', mipipadctrl_table)
+
+    print('''\
+};
+
+''', end='')
+
+print('''\
 #endif /* PINMUX_CONFIG_%s_H */
 ''' % board.definename, end='')
 
diff --git a/csv-to-board.py b/csv-to-board.py
index b2d1c46ec302..68653588ef69 100755
--- a/csv-to-board.py
+++ b/csv-to-board.py
@@ -173,6 +173,7 @@ def rcv_sel_munge(d):
 
 found_header = False
 pin_table = []
+mipi_table = []
 with open(board_conf['filename'], newline='') as fh:
     csv = csv.reader(fh)
     lnum = 0
@@ -203,6 +204,12 @@ with open(board_conf['filename'], newline='') as fh:
             continue
 
         ball_name = row[cols[COL_BALL_NAME]].lower()
+        if ball_name.startswith('mipi_pad_ctrl_'):
+            ball_name = ball_name[14:]
+            mipi = soc.mipi_pad_ctrl_group_by_name(ball_name)
+        else:
+            mipi = None
+
         if cols[COL_BALL_MID]:
             ball_mid = row[cols[COL_BALL_MID]]
         else:
@@ -212,12 +219,17 @@ with open(board_conf['filename'], newline='') as fh:
         else:
             ball_dsc = None
 
+
         # Section title row
-        if not ball_mid and not ball_dsc:
+        if not ball_mid and not ball_dsc and not mipi:
             continue
 
         mux = func_munge(row[cols[COL_MUX]].lower())
 
+        if mipi:
+            mipi_table.append((repr(mipi.name), repr(mux)))
+            continue
+
         # Pin not affected by pinmux
         if mux in ('', '0', '#n/a'):
             continue
@@ -286,21 +298,25 @@ with open(board_conf['filename'], newline='') as fh:
 
         pin_table.append((repr(gpio_pin.fullname), repr(mux), repr(gpio_init), repr(pupd), repr(tri), repr(e_input), repr(od), repr(rcv_sel)))
 
-headings = ('pin', 'mux', 'gpio_init', 'pull', 'tri', 'e_inp', 'od')
+pin_headings = ('pin', 'mux', 'gpio_init', 'pull', 'tri', 'e_inp', 'od')
 if soc.soc_pins_have_e_io_hv:
-    headings += ('e_io_hv',)
+    pin_headings += ('e_io_hv',)
 if soc.soc_pins_have_rcv_sel:
-    headings += ('rcv_sel',)
+    pin_headings += ('rcv_sel',)
+
+mipi_headings = ('pin', 'mux')
 
 cfgfile = os.path.join('configs', args.board + '.board')
 with open(cfgfile, 'wt') as fh:
     print('soc = \'%s\'' % board_conf['soc'], file=fh)
     print(file=fh)
     print('pins = (', file=fh)
-
-    dump_py_table(headings, pin_table, file=fh)
-
+    dump_py_table(pin_headings, pin_table, file=fh)
     print(')', file=fh)
     print('', file=fh)
     print('drive_groups = (', file=fh)
     print(')', file=fh)
+    print('', file=fh)
+    print('mipi_pad_ctrl_groups = (', file=fh)
+    dump_py_table(mipi_headings, mipi_table, file=fh)
+    print(')', file=fh)
diff --git a/tegra_pmx_board_parser.py b/tegra_pmx_board_parser.py
index b72bc8bffc06..f47947dd7ed5 100644
--- a/tegra_pmx_board_parser.py
+++ b/tegra_pmx_board_parser.py
@@ -37,6 +37,13 @@ class PinConfig(ReprDictObj):
             self.__setattr__(field, data[i])
         self.gpio_pin = soc.gpio_or_pin_by_fullname(self.fullname)
 
+class MipiPadCtrlConfig(ReprDictObj):
+    def __init__(self, soc, data):
+        fields = ('name', 'mux')
+        for i, field in enumerate(fields):
+            self.__setattr__(field, data[i])
+        self.mipi_pad_ctrl_group = soc.mipi_pad_ctrl_group_by_name(self.name)
+
 class Board(TopLevelParsedObj):
     def __init__(self, name, data):
         TopLevelParsedObj.__init__(self, name, (), data)
@@ -54,10 +61,17 @@ class Board(TopLevelParsedObj):
         # FIXME: fill this in...
         self.drvcfg = []
 
+        self._mipipadctrlcfgs = []
+        if 'mipi_pad_ctrl_groups' in data:
+            for num, pindata in enumerate(data['mipi_pad_ctrl_groups']):
+                mipipadctrlcfg = MipiPadCtrlConfig(self.soc, pindata)
+                self._mipipadctrlcfgs.append(mipipadctrlcfg)
+
         self._generate_derived_data()
 
     def _generate_derived_data(self):
         self._pincfgs_by_num = sorted(self._pincfgs, key=lambda pincfg: pincfg.gpio_pin.sort_by_num_key())
+        self._mipipadctrlcfgs_by_num = sorted(self._mipipadctrlcfgs, key=lambda cfg: cfg.mipi_pad_ctrl_group.reg)
 
     def pincfgs_by_conf_order(self):
         return self._pincfgs
@@ -65,6 +79,12 @@ class Board(TopLevelParsedObj):
     def pincfgs_by_num(self):
         return self._pincfgs_by_num
 
+    def mipipadctrlcfgs_by_conf_order(self):
+        return self._mipipadctrlcfgs
+
+    def mipipadctrlcfgs_by_num(self):
+        return self._mipipadctrlcfgs_by_num
+
     def warn_about_unconfigured_pins(self):
         unconfigured_gpio_pins = [gpio_pin.fullname for gpio_pin in self.soc.gpios_pins_by_num() if gpio_pin.reg]
         for gpio_pin in self.pincfgs_by_num():
-- 
1.9.1

Re: [pinmux scripts PATCH 1/5] Remove stale FIXME in board-to-uboot.py

[Stephen Warren]

On 03/25/2015 12:06 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> The FIXME has already been fixed!

Since the U-Boot patches that these changes generate have been applied, 
I've applied this series.