From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org,
Mikko Perttunen <mperttunen@nvidia.com>
Subject: Re: [PATCH v3 12/16] drm/tegra: Setup shared IOMMU domain after initialization
Date: Fri, 1 Feb 2019 17:48:46 +0300 [thread overview]
Message-ID: <55a355ff-9345-142e-b155-1979b5852a39@gmail.com> (raw)
In-Reply-To: <20190201132837.12327-13-thierry.reding@gmail.com>
01.02.2019 16:28, Thierry Reding пишет:
> From: Thierry Reding <treding@nvidia.com>
>
> Move initialization of the shared IOMMU domain after the host1x device
> has been initialized. At this point all the Tegra DRM clients have been
> attached to the shared IOMMU domain.
>
> This is important because Tegra186 and later use an ARM SMMU, for which
> the driver defers setting up the geometry for a domain until a device is
> attached to it. This is to ensure that the domain is properly set up for
> a specific ARM SMMU instance, which is unknown at allocation time.
>
> Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> drivers/gpu/drm/tegra/drm.c | 54 ++++++++++++++++++++-----------------
> 1 file changed, 29 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
> index 61dcbd218ffc..271c7a5fc954 100644
> --- a/drivers/gpu/drm/tegra/drm.c
> +++ b/drivers/gpu/drm/tegra/drm.c
> @@ -92,10 +92,6 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
> return -ENOMEM;
>
> if (iommu_present(&platform_bus_type)) {
> - u64 carveout_start, carveout_end, gem_start, gem_end;
> - struct iommu_domain_geometry *geometry;
> - unsigned long order;
> -
> tegra->domain = iommu_domain_alloc(&platform_bus_type);
> if (!tegra->domain) {
> err = -ENOMEM;
> @@ -105,27 +101,6 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
> err = iova_cache_get();
> if (err < 0)
> goto domain;
> -
> - geometry = &tegra->domain->geometry;
> - gem_start = geometry->aperture_start;
> - gem_end = geometry->aperture_end - CARVEOUT_SZ;
> - carveout_start = gem_end + 1;
> - carveout_end = geometry->aperture_end;
> -
> - order = __ffs(tegra->domain->pgsize_bitmap);
> - init_iova_domain(&tegra->carveout.domain, 1UL << order,
> - carveout_start >> order);
> -
> - tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
> - tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
> -
> - drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
> - mutex_init(&tegra->mm_lock);
> -
> - DRM_DEBUG("IOMMU apertures:\n");
> - DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
> - DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
> - carveout_end);
> }
>
> mutex_init(&tegra->clients_lock);
> @@ -159,6 +134,35 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
> if (err < 0)
> goto fbdev;
>
> + if (tegra->domain) {
> + u64 carveout_start, carveout_end, gem_start, gem_end;
> + dma_addr_t start, end;
> + unsigned long order;
> +
> + start = tegra->domain->geometry.aperture_start;
> + end = tegra->domain->geometry.aperture_end;
> +
> + gem_start = start;
> + gem_end = end - CARVEOUT_SZ;
> + carveout_start = gem_end + 1;
> + carveout_end = end;
> +
> + order = __ffs(tegra->domain->pgsize_bitmap);
> + init_iova_domain(&tegra->carveout.domain, 1UL << order,
> + carveout_start >> order);
> +
> + tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
> + tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
> +
> + drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
> + mutex_init(&tegra->mm_lock);
> +
> + DRM_DEBUG("IOMMU apertures:\n");
> + DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
> + DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
> + carveout_end);
> + }
> +
> if (tegra->hub) {
> err = tegra_display_hub_prepare(tegra->hub);
> if (err < 0)
>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
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next prev parent reply other threads:[~2019-02-01 14:48 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-01 13:28 [PATCH v3 00/16] drm/tegra: Fix IOVA space on Tegra186 and later Thierry Reding
2019-02-01 13:28 ` [PATCH v3 01/16] gpu: host1x: Set up stream ID table Thierry Reding
2019-02-01 13:28 ` [PATCH v3 02/16] gpu: host1x: Program the channel stream ID Thierry Reding
2019-02-01 13:28 ` [PATCH v3 03/16] gpu: host1x: Introduce support for wide opcodes Thierry Reding
2019-02-01 13:28 ` [PATCH v3 04/16] gpu: host1x: Support 40-bit addressing Thierry Reding
2019-02-01 13:28 ` [PATCH v3 05/16] gpu: host1x: Use direct DMA with IOMMU API usage Thierry Reding
2019-02-01 14:46 ` Dmitry Osipenko
2019-02-01 13:28 ` [PATCH v3 06/16] gpu: host1x: Restrict IOVA space to DMA mask Thierry Reding
2019-02-01 14:47 ` Dmitry Osipenko
2019-02-01 13:28 ` [PATCH v3 07/16] gpu: host1x: Support 40-bit addressing on Tegra186 Thierry Reding
2019-02-01 13:28 ` [PATCH v3 08/16] gpu: host1x: Use correct semantics for HOST1X_CHANNEL_DMAEND Thierry Reding
2019-02-01 13:37 ` Dmitry Osipenko
2019-02-01 13:41 ` Thierry Reding
2019-02-01 13:48 ` Dmitry Osipenko
2019-02-01 14:10 ` Thierry Reding
2019-02-01 14:40 ` Dmitry Osipenko
2019-02-01 14:47 ` Dmitry Osipenko
2019-02-01 13:28 ` [PATCH v3 09/16] gpu: host1x: Optimize CDMA push buffer memory usage Thierry Reding
2019-02-01 14:48 ` Dmitry Osipenko
2019-02-01 13:28 ` [PATCH v3 10/16] drm/tegra: Store parent pointer in Tegra DRM clients Thierry Reding
2019-02-01 14:48 ` Dmitry Osipenko
2019-02-01 13:28 ` [PATCH v3 11/16] drm/tegra: vic: Load firmware on demand Thierry Reding
2019-02-01 13:28 ` [PATCH v3 12/16] drm/tegra: Setup shared IOMMU domain after initialization Thierry Reding
2019-02-01 14:48 ` Dmitry Osipenko [this message]
2019-02-01 13:28 ` [PATCH v3 13/16] drm/tegra: Restrict IOVA space to DMA mask Thierry Reding
2019-02-01 14:49 ` Dmitry Osipenko
2019-02-01 13:28 ` [PATCH v3 14/16] drm/tegra: vic: Do not clear driver data Thierry Reding
2019-02-01 13:28 ` [PATCH v3 15/16] drm/tegra: vic: Support stream ID register programming Thierry Reding
2019-02-01 13:28 ` [PATCH v3 16/16] arm64: tegra: Enable SMMU for VIC on Tegra186 Thierry Reding
2019-02-01 14:46 ` [PATCH v3 00/16] drm/tegra: Fix IOVA space on Tegra186 and later Dmitry Osipenko
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